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@@ -334,3 +334,45 @@ int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx5_query_port_vl_hw_cap);
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+
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+int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause)
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+{
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+ u32 in[MLX5_ST_SZ_DW(pfcc_reg)];
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+ u32 out[MLX5_ST_SZ_DW(pfcc_reg)];
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+ int err;
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+
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+ memset(in, 0, sizeof(in));
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+ MLX5_SET(pfcc_reg, in, local_port, 1);
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+ MLX5_SET(pfcc_reg, in, pptx, tx_pause);
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+ MLX5_SET(pfcc_reg, in, pprx, rx_pause);
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+
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+ err = mlx5_core_access_reg(dev, in, sizeof(in), out,
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+ sizeof(out), MLX5_REG_PFCC, 0, 1);
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+ return err;
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+}
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+EXPORT_SYMBOL_GPL(mlx5_set_port_pause);
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+
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+int mlx5_query_port_pause(struct mlx5_core_dev *dev,
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+ u32 *rx_pause, u32 *tx_pause)
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+{
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+ u32 in[MLX5_ST_SZ_DW(pfcc_reg)];
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+ u32 out[MLX5_ST_SZ_DW(pfcc_reg)];
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+ int err;
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+
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+ memset(in, 0, sizeof(in));
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+ MLX5_SET(pfcc_reg, in, local_port, 1);
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+
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+ err = mlx5_core_access_reg(dev, in, sizeof(in), out,
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+ sizeof(out), MLX5_REG_PFCC, 0, 0);
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+ if (err)
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+ return err;
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+
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+ if (rx_pause)
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+ *rx_pause = MLX5_GET(pfcc_reg, out, pprx);
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+
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+ if (tx_pause)
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+ *tx_pause = MLX5_GET(pfcc_reg, out, pptx);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(mlx5_query_port_pause);
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