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@@ -25,7 +25,7 @@ first time, it was renamed to 'EDAC'.
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The bluesmoke project at sourceforge.net is now utilized as a 'staging area'
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for EDAC development, before it is sent upstream to kernel.org
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-At the bluesmoke/EDAC project site is a series of quilt patches against
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+At the bluesmoke/EDAC project site, there is a series of quilt patches against
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recent kernels, stored in a SVN repository. For easier downloading, there
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is also a tarball snapshot available.
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@@ -235,7 +235,7 @@ In 'mcX' directories are EDAC control and attribute files for
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this 'X' instance of the memory controllers.
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For a description of the sysfs API, please see:
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- Documentation/ABI/testing/sysfs/devices-edac
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+ Documentation/ABI/testing/sysfs-devices-edac
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============================================================================
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@@ -276,7 +276,7 @@ Total memory managed by this csrow attribute file:
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'size_mb'
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- This attribute file displays, in count of megabytes, of memory
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+ This attribute file displays, in count of megabytes, the memory
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that this csrow contains.
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@@ -516,7 +516,7 @@ Panic on PCI PARITY Error:
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'panic_on_pci_parity'
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- This control files enables or disables panicking when a parity
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+ This control file enables or disables panicking when a parity
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error has been detected.
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@@ -617,7 +617,7 @@ The 'test_device_edac' device adds 4 attributes and 1 control:
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reset all the above counters.
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-Use of the 'test_device_edac' driver should any others to create their own
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+Use of the 'test_device_edac' driver should enable any others to create their own
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unique drivers for their hardware systems.
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The 'test_device_edac' sample driver is located at the
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@@ -633,7 +633,7 @@ of the driver.
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Due to the way Nehalem exports Memory Controller data, some adjustments
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were done at i7core_edac driver. This chapter will cover those differences
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-1) On Nehalem, there are one Memory Controller per Quick Patch Interconnect
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+1) On Nehalem, there is one Memory Controller per Quick Patch Interconnect
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(QPI). At the driver, the term "socket" means one QPI. This is
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associated with a physical CPU socket.
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@@ -642,7 +642,7 @@ were done at i7core_edac driver. This chapter will cover those differences
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Each channel can have up to 3 DIMMs.
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The minimum known unity is DIMMs. There are no information about csrows.
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- As EDAC API maps the minimum unity is csrows, the driver sequencially
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+ As EDAC API maps the minimum unity is csrows, the driver sequentially
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maps channel/dimm into different csrows.
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For example, supposing the following layout:
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@@ -664,7 +664,7 @@ exports one
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Each QPI is exported as a different memory controller.
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-2) Nehalem MC has the hability to generate errors. The driver implements this
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+2) Nehalem MC has the ability to generate errors. The driver implements this
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functionality via some error injection nodes:
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For injecting a memory error, there are some sysfs nodes, under
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@@ -771,5 +771,5 @@ exports one
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The standard error counters are generated when an mcelog error is received
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by the driver. Since, with udimm, this is counted by software, it is
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- possible that some errors could be lost. With rdimm's, they displays the
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+ possible that some errors could be lost. With rdimm's, they display the
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contents of the registers
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Rami Rosen