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@@ -605,6 +605,9 @@ static void set_command_address(struct pxa3xx_nand_info *info,
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static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
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static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
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{
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{
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+ struct pxa3xx_nand_host *host = info->host[info->cs];
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+ struct mtd_info *mtd = host->mtd;
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+
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/* reset data and oob column point to handle data */
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/* reset data and oob column point to handle data */
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info->buf_start = 0;
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info->buf_start = 0;
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info->buf_count = 0;
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info->buf_count = 0;
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@@ -629,6 +632,19 @@ static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
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info->ndcb2 = 0;
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info->ndcb2 = 0;
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break;
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break;
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}
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}
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+
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+ /*
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+ * If we are about to issue a read command, or about to set
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+ * the write address, then clean the data buffer.
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+ */
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+ if (command == NAND_CMD_READ0 ||
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+ command == NAND_CMD_READOOB ||
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+ command == NAND_CMD_SEQIN) {
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+
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+ info->buf_count = mtd->writesize + mtd->oobsize;
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+ memset(info->data_buff, 0xFF, info->buf_count);
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+ }
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+
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}
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}
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static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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@@ -670,16 +686,11 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
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set_command_address(info, mtd->writesize, column, page_addr);
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set_command_address(info, mtd->writesize, column, page_addr);
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- info->buf_count = mtd->writesize + mtd->oobsize;
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- memset(info->data_buff, 0xFF, info->buf_count);
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break;
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break;
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case NAND_CMD_SEQIN:
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case NAND_CMD_SEQIN:
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set_command_address(info, mtd->writesize, column, page_addr);
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set_command_address(info, mtd->writesize, column, page_addr);
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- info->buf_count = mtd->writesize + mtd->oobsize;
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- memset(info->data_buff, 0xFF, info->buf_count);
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-
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break;
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break;
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case NAND_CMD_PAGEPROG:
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case NAND_CMD_PAGEPROG:
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