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@@ -34,7 +34,7 @@
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#define RK3288_DSI0_SEL_VOP_LIT BIT(6)
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#define RK3288_DSI1_SEL_VOP_LIT BIT(9)
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-#define RK3399_GRF_SOC_CON19 0x6250
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+#define RK3399_GRF_SOC_CON20 0x6250
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#define RK3399_DSI0_SEL_VOP_LIT BIT(0)
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#define RK3399_DSI1_SEL_VOP_LIT BIT(4)
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@@ -1151,7 +1151,7 @@ static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
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static struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
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.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
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.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
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- .grf_switch_reg = RK3399_GRF_SOC_CON19,
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+ .grf_switch_reg = RK3399_GRF_SOC_CON20,
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.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
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.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
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.flags = DW_MIPI_NEEDS_PHY_CFG_CLK | DW_MIPI_NEEDS_GRF_CLK,
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