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ARM: dts: fix highbank cpu mpidr values

With the addition of commit a0ae0240 (ARM: kernel: add device tree init
map function), the cpu reg values must match the cpu mpidr register or we'll
get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg
value needs to be 0x90n to quiet the warnings.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Rob Herring 12 年之前
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共有 1 个文件被更改,包括 8 次插入8 次删除
  1. 8 8
      arch/arm/boot/dts/highbank.dts

+ 8 - 8
arch/arm/boot/dts/highbank.dts

@@ -30,37 +30,37 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu@900 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <0>;
+			reg = <0x900>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@1 {
+		cpu@901 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <1>;
+			reg = <0x901>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@2 {
+		cpu@902 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <2>;
+			reg = <0x902>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";
 		};
 
-		cpu@3 {
+		cpu@903 {
 			compatible = "arm,cortex-a9";
 			device_type = "cpu";
-			reg = <3>;
+			reg = <0x903>;
 			next-level-cache = <&L2>;
 			clocks = <&a9pll>;
 			clock-names = "cpu";