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@@ -525,15 +525,14 @@ static int cqspi_indirect_read_execute(struct spi_nor *nor, u8 *rxbuf,
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reg_base + CQSPI_REG_INDIRECTRD);
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while (remaining > 0) {
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- ret = wait_for_completion_timeout(&cqspi->transfer_complete,
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- msecs_to_jiffies
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- (CQSPI_READ_TIMEOUT_MS));
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+ if (!wait_for_completion_timeout(&cqspi->transfer_complete,
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+ msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS)))
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+ ret = -ETIMEDOUT;
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bytes_to_read = cqspi_get_rd_sram_level(cqspi);
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- if (!ret && bytes_to_read == 0) {
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+ if (ret && bytes_to_read == 0) {
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dev_err(nor->dev, "Indirect read timeout, no bytes\n");
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- ret = -ETIMEDOUT;
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goto failrd;
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}
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@@ -649,10 +648,8 @@ static int cqspi_indirect_write_execute(struct spi_nor *nor, loff_t to_addr,
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iowrite32_rep(cqspi->ahb_base, txbuf,
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DIV_ROUND_UP(write_bytes, 4));
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- ret = wait_for_completion_timeout(&cqspi->transfer_complete,
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- msecs_to_jiffies
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- (CQSPI_TIMEOUT_MS));
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- if (!ret) {
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+ if (!wait_for_completion_timeout(&cqspi->transfer_complete,
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+ msecs_to_jiffies(CQSPI_TIMEOUT_MS))) {
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dev_err(nor->dev, "Indirect write timeout\n");
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ret = -ETIMEDOUT;
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goto failwr;
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@@ -986,9 +983,8 @@ static int cqspi_direct_read_execute(struct spi_nor *nor, u_char *buf,
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}
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dma_async_issue_pending(cqspi->rx_chan);
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- ret = wait_for_completion_timeout(&cqspi->rx_dma_complete,
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- msecs_to_jiffies(len));
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- if (ret <= 0) {
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+ if (!wait_for_completion_timeout(&cqspi->rx_dma_complete,
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+ msecs_to_jiffies(len))) {
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dmaengine_terminate_sync(cqspi->rx_chan);
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dev_err(nor->dev, "DMA wait_for_completion_timeout\n");
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ret = -ETIMEDOUT;
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