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@@ -1463,7 +1463,9 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
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uint64_t count;
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max_entries = min(max_entries, 16ull * 1024ull);
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- for (count = 1; count < max_entries; ++count) {
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+ for (count = 1;
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+ count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
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+ ++count) {
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uint64_t idx = pfn + count;
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if (pages_addr[idx] !=
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@@ -1476,7 +1478,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
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dma_addr = pages_addr;
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} else {
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addr = pages_addr[pfn];
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- max_entries = count;
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+ max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
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}
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} else if (flags & AMDGPU_PTE_VALID) {
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@@ -1491,7 +1493,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
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if (r)
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return r;
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- pfn += last - start + 1;
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+ pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
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if (nodes && nodes->size == pfn) {
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pfn = 0;
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++nodes;
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