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@@ -2313,6 +2313,32 @@ static const char * const aclk_parents[] = {
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"clk_m"
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};
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+void tegra210_put_utmipll_in_iddq(void)
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+{
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+ u32 reg;
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+
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+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
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+
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+ if (reg & UTMIPLL_HW_PWRDN_CFG0_UTMIPLL_LOCK) {
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+ pr_err("trying to assert IDDQ while UTMIPLL is locked\n");
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+ return;
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+ }
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+
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+ reg |= UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
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+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
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+}
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+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_in_iddq);
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+
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+void tegra210_put_utmipll_out_iddq(void)
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+{
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+ u32 reg;
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+
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+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
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+ reg &= ~UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
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+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
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+}
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+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_out_iddq);
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+
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static __init void tegra210_periph_clk_init(void __iomem *clk_base,
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void __iomem *pmc_base)
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{
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