|
@@ -211,7 +211,7 @@ struct mxs_lradc {
|
|
|
|
|
|
const uint32_t *vref_mv;
|
|
|
struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
|
|
|
- unsigned int is_divided[LRADC_MAX_TOTAL_CHANS];
|
|
|
+ unsigned long is_divided;
|
|
|
|
|
|
/*
|
|
|
* Touchscreen LRADC channels receives a private slot in the CTRL4
|
|
@@ -920,7 +920,7 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
|
|
|
|
|
|
*val = lradc->vref_mv[chan->channel];
|
|
|
*val2 = chan->scan_type.realbits -
|
|
|
- lradc->is_divided[chan->channel];
|
|
|
+ test_bit(chan->channel, &lradc->is_divided);
|
|
|
return IIO_VAL_FRACTIONAL_LOG2;
|
|
|
|
|
|
case IIO_CHAN_INFO_OFFSET:
|
|
@@ -965,14 +965,14 @@ static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
|
|
|
/* divider by two disabled */
|
|
|
writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
|
|
|
lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
|
|
|
- lradc->is_divided[chan->channel] = 0;
|
|
|
+ clear_bit(chan->channel, &lradc->is_divided);
|
|
|
ret = 0;
|
|
|
} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
|
|
|
val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
|
|
|
/* divider by two enabled */
|
|
|
writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
|
|
|
lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
|
|
|
- lradc->is_divided[chan->channel] = 1;
|
|
|
+ set_bit(chan->channel, &lradc->is_divided);
|
|
|
ret = 0;
|
|
|
}
|
|
|
|