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@@ -111,6 +111,12 @@ static void fec_enet_itr_coal_init(struct net_device *ndev);
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* independent rings
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*/
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#define FEC_QUIRK_HAS_AVB (1 << 8)
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+/* There is a TDAR race condition for mutliQ when the software sets TDAR
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+ * and the UDMA clears TDAR simultaneously or in a small window (2-4 cycles).
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+ * This will cause the udma_tx and udma_tx_arbiter state machines to hang.
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+ * The issue exist at i.MX6SX enet IP.
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+ */
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+#define FEC_QUIRK_ERR007885 (1 << 9)
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static struct platform_device_id fec_devtype[] = {
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{
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@@ -139,7 +145,7 @@ static struct platform_device_id fec_devtype[] = {
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.driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
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FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
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FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358 |
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- FEC_QUIRK_HAS_AVB,
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+ FEC_QUIRK_HAS_AVB | FEC_QUIRK_ERR007885,
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}, {
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/* sentinel */
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}
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@@ -709,6 +715,8 @@ static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,
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struct tso_t tso;
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unsigned int index = 0;
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int ret;
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+ const struct platform_device_id *id_entry =
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+ platform_get_device_id(fep->pdev);
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if (tso_count_descs(skb) >= fec_enet_get_free_txdesc_num(fep, txq)) {
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dev_kfree_skb_any(skb);
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@@ -770,7 +778,12 @@ static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,
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txq->cur_tx = bdp;
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/* Trigger transmission start */
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- writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
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+ if (!(id_entry->driver_data & FEC_QUIRK_ERR007885) ||
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+ !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
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+ !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
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+ !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
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+ !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)))
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+ writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
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return 0;
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