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@@ -312,7 +312,8 @@ int pciehp_check_link_status(struct controller *ctrl)
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ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
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ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
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if ((lnk_status & PCI_EXP_LNKSTA_LT) ||
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if ((lnk_status & PCI_EXP_LNKSTA_LT) ||
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!(lnk_status & PCI_EXP_LNKSTA_NLW)) {
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!(lnk_status & PCI_EXP_LNKSTA_NLW)) {
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- ctrl_err(ctrl, "Link Training Error occurs\n");
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+ ctrl_err(ctrl, "link training error: status %#06x\n",
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+ lnk_status);
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return -1;
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return -1;
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}
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}
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@@ -556,7 +557,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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intr_loc);
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intr_loc);
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} while (detected);
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} while (detected);
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- ctrl_dbg(ctrl, "%s: intr_loc %x\n", __func__, intr_loc);
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+ ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", intr_loc);
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/* Check Command Complete Interrupt Pending */
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/* Check Command Complete Interrupt Pending */
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if (intr_loc & PCI_EXP_SLTSTA_CC) {
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if (intr_loc & PCI_EXP_SLTSTA_CC) {
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@@ -748,48 +749,13 @@ static void pcie_cleanup_slot(struct controller *ctrl)
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static inline void dbg_ctrl(struct controller *ctrl)
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static inline void dbg_ctrl(struct controller *ctrl)
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{
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{
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- int i;
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- u16 reg16;
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struct pci_dev *pdev = ctrl->pcie->port;
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struct pci_dev *pdev = ctrl->pcie->port;
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+ u16 reg16;
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if (!pciehp_debug)
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if (!pciehp_debug)
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return;
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return;
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- ctrl_info(ctrl, "Hotplug Controller:\n");
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- ctrl_info(ctrl, " Seg/Bus/Dev/Func/IRQ : %s IRQ %d\n",
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- pci_name(pdev), pdev->irq);
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- ctrl_info(ctrl, " Vendor ID : 0x%04x\n", pdev->vendor);
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- ctrl_info(ctrl, " Device ID : 0x%04x\n", pdev->device);
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- ctrl_info(ctrl, " Subsystem ID : 0x%04x\n",
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- pdev->subsystem_device);
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- ctrl_info(ctrl, " Subsystem Vendor ID : 0x%04x\n",
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- pdev->subsystem_vendor);
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- ctrl_info(ctrl, " PCIe Cap offset : 0x%02x\n",
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- pci_pcie_cap(pdev));
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- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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- if (!pci_resource_len(pdev, i))
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- continue;
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- ctrl_info(ctrl, " PCI resource [%d] : %pR\n",
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- i, &pdev->resource[i]);
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- }
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ctrl_info(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap);
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ctrl_info(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap);
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- ctrl_info(ctrl, " Physical Slot Number : %d\n", PSN(ctrl));
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- ctrl_info(ctrl, " Attention Button : %3s\n",
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- ATTN_BUTTN(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " Power Controller : %3s\n",
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- POWER_CTRL(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " MRL Sensor : %3s\n",
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- MRL_SENS(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " Attention Indicator : %3s\n",
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- ATTN_LED(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " Power Indicator : %3s\n",
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- PWR_LED(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " Hot-Plug Surprise : %3s\n",
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- HP_SUPR_RM(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " EMI Present : %3s\n",
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- EMI(ctrl) ? "yes" : "no");
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- ctrl_info(ctrl, " Command Completed : %3s\n",
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- NO_CMD_CMPL(ctrl) ? "no" : "yes");
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, ®16);
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, ®16);
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ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16);
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ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16);
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pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, ®16);
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pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, ®16);
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@@ -818,10 +784,8 @@ struct controller *pcie_init(struct pcie_device *dev)
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/* Check if Data Link Layer Link Active Reporting is implemented */
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/* Check if Data Link Layer Link Active Reporting is implemented */
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pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
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pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
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- if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {
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- ctrl_dbg(ctrl, "Link Active Reporting supported\n");
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+ if (link_cap & PCI_EXP_LNKCAP_DLLLARC)
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ctrl->link_active_reporting = 1;
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ctrl->link_active_reporting = 1;
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- }
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/* Clear all remaining event bits in Slot Status register */
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/* Clear all remaining event bits in Slot Status register */
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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@@ -829,13 +793,15 @@ struct controller *pcie_init(struct pcie_device *dev)
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PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
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PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
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PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC);
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PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC);
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- ctrl_info(ctrl, "Slot #%d AttnBtn%c AttnInd%c PwrInd%c PwrCtrl%c MRL%c Interlock%c NoCompl%c LLActRep%c\n",
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+ ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c LLActRep%c\n",
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(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
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(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
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FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
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- FLAG(slot_cap, PCI_EXP_SLTCAP_AIP),
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- FLAG(slot_cap, PCI_EXP_SLTCAP_PIP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP),
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+ FLAG(slot_cap, PCI_EXP_SLTCAP_AIP),
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+ FLAG(slot_cap, PCI_EXP_SLTCAP_PIP),
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+ FLAG(slot_cap, PCI_EXP_SLTCAP_HPC),
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+ FLAG(slot_cap, PCI_EXP_SLTCAP_HPS),
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FLAG(slot_cap, PCI_EXP_SLTCAP_EIP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_EIP),
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FLAG(slot_cap, PCI_EXP_SLTCAP_NCCS),
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FLAG(slot_cap, PCI_EXP_SLTCAP_NCCS),
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FLAG(link_cap, PCI_EXP_LNKCAP_DLLLARC));
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FLAG(link_cap, PCI_EXP_LNKCAP_DLLLARC));
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