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@@ -26,6 +26,7 @@
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#include "ar9462_2p0_initvals.h"
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#include "ar9462_2p1_initvals.h"
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#include "ar9565_1p0_initvals.h"
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+#include "ar9565_1p1_initvals.h"
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/* General hardware code for the AR9003 hadware family */
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@@ -335,6 +336,41 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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INIT_INI_ARRAY(&ah->iniModesFastClock,
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ar9580_1p0_modes_fast_clock);
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+ } else if (AR_SREV_9565_11_OR_LATER(ah)) {
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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+ ar9565_1p1_mac_core);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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+ ar9565_1p1_mac_postamble);
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+
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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+ ar9565_1p1_baseband_core);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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+ ar9565_1p1_baseband_postamble);
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+
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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+ ar9565_1p1_radio_core);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
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+ ar9565_1p1_radio_postamble);
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+
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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+ ar9565_1p1_soc_preamble);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
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+ ar9565_1p1_soc_postamble);
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+
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar9565_1p1_Common_rx_gain_table);
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9565_1p1_Modes_lowest_ob_db_tx_gain_table);
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+
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+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
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+ ar9565_1p1_pciephy_clkreq_disable_L1);
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+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
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+ ar9565_1p1_pciephy_clkreq_disable_L1);
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+
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+ INIT_INI_ARRAY(&ah->iniModesFastClock,
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+ ar9565_1p1_modes_fast_clock);
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+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
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+ ar9565_1p1_baseband_core_txfir_coeff_japan_2484);
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} else if (AR_SREV_9565(ah)) {
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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ar9565_1p0_mac_core);
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@@ -445,6 +481,9 @@ static void ar9003_tx_gain_table_mode0(struct ath_hw *ah)
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else if (AR_SREV_9462_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9462_modes_low_ob_db_tx_gain_table_2p0);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9565_1p1_modes_low_ob_db_tx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9565_1p0_modes_low_ob_db_tx_gain_table);
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@@ -479,6 +518,9 @@ static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
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else if (AR_SREV_9462_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9462_modes_high_ob_db_tx_gain_table_2p0);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9565_1p1_modes_high_ob_db_tx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9565_1p0_modes_high_ob_db_tx_gain_table);
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@@ -504,6 +546,9 @@ static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
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else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9580_1p0_low_ob_db_tx_gain_table);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9565_1p1_modes_low_ob_db_tx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9565_1p0_modes_low_ob_db_tx_gain_table);
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@@ -529,6 +574,9 @@ static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
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else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9580_1p0_high_power_tx_gain_table);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar9565_1p1_modes_high_power_tx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9565_1p0_modes_high_power_tx_gain_table);
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@@ -642,6 +690,9 @@ static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
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else if (AR_SREV_9462_20(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9462_common_rx_gain_table_2p0);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar9565_1p1_Common_rx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9565_1p0_Common_rx_gain_table);
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@@ -678,6 +729,9 @@ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
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} else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9580_1p0_wo_xlna_rx_gain_table);
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+ else if (AR_SREV_9565_11(ah))
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar9565_1p1_common_wo_xlna_rx_gain_table);
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else if (AR_SREV_9565(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9565_1p0_common_wo_xlna_rx_gain_table);
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