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@@ -33,6 +33,18 @@
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#define KVM_GUEST_PC_TLB 0
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#define KVM_GUEST_SP_TLB 1
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+#ifdef CONFIG_KVM_MIPS_VZ
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+static u32 kvm_mips_get_root_asid(struct kvm_vcpu *vcpu)
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+{
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+ struct mm_struct *gpa_mm = &vcpu->kvm->arch.gpa_mm;
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+
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+ if (cpu_has_guestid)
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+ return 0;
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+ else
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+ return cpu_asid(smp_processor_id(), gpa_mm);
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+}
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+#endif
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+
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static u32 kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
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{
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struct mm_struct *kern_mm = &vcpu->arch.guest_kernel_mm;
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@@ -179,6 +191,398 @@ int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va,
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}
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EXPORT_SYMBOL_GPL(kvm_mips_host_tlb_inv);
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+#ifdef CONFIG_KVM_MIPS_VZ
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+
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+/* GuestID management */
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+
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+/**
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+ * clear_root_gid() - Set GuestCtl1.RID for normal root operation.
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+ */
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+static inline void clear_root_gid(void)
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+{
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+ if (cpu_has_guestid) {
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+ clear_c0_guestctl1(MIPS_GCTL1_RID);
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+ mtc0_tlbw_hazard();
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+ }
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+}
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+
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+/**
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+ * set_root_gid_to_guest_gid() - Set GuestCtl1.RID to match GuestCtl1.ID.
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+ *
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+ * Sets the root GuestID to match the current guest GuestID, for TLB operation
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+ * on the GPA->RPA mappings in the root TLB.
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+ *
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+ * The caller must be sure to disable HTW while the root GID is set, and
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+ * possibly longer if TLB registers are modified.
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+ */
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+static inline void set_root_gid_to_guest_gid(void)
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+{
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+ unsigned int guestctl1;
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+
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+ if (cpu_has_guestid) {
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+ back_to_back_c0_hazard();
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+ guestctl1 = read_c0_guestctl1();
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+ guestctl1 = (guestctl1 & ~MIPS_GCTL1_RID) |
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+ ((guestctl1 & MIPS_GCTL1_ID) >> MIPS_GCTL1_ID_SHIFT)
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+ << MIPS_GCTL1_RID_SHIFT;
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+ write_c0_guestctl1(guestctl1);
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+ mtc0_tlbw_hazard();
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+ }
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+}
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+
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+int kvm_vz_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va)
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+{
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+ int idx;
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+ unsigned long flags, old_entryhi;
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+
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+ local_irq_save(flags);
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+ htw_stop();
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+
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+ /* Set root GuestID for root probe and write of guest TLB entry */
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+ set_root_gid_to_guest_gid();
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+
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+ old_entryhi = read_c0_entryhi();
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+
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+ idx = _kvm_mips_host_tlb_inv((va & VPN2_MASK) |
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+ kvm_mips_get_root_asid(vcpu));
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+
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+ write_c0_entryhi(old_entryhi);
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+ clear_root_gid();
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+ mtc0_tlbw_hazard();
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+
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+ htw_start();
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+ local_irq_restore(flags);
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+
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+ if (idx > 0)
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+ kvm_debug("%s: Invalidated root entryhi %#lx @ idx %d\n",
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+ __func__, (va & VPN2_MASK) |
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+ kvm_mips_get_root_asid(vcpu), idx);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(kvm_vz_host_tlb_inv);
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+
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+/**
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+ * kvm_vz_guest_tlb_lookup() - Lookup a guest VZ TLB mapping.
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+ * @vcpu: KVM VCPU pointer.
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+ * @gpa: Guest virtual address in a TLB mapped guest segment.
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+ * @gpa: Ponter to output guest physical address it maps to.
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+ *
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+ * Converts a guest virtual address in a guest TLB mapped segment to a guest
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+ * physical address, by probing the guest TLB.
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+ *
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+ * Returns: 0 if guest TLB mapping exists for @gva. *@gpa will have been
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+ * written.
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+ * -EFAULT if no guest TLB mapping exists for @gva. *@gpa may not
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+ * have been written.
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+ */
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+int kvm_vz_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long gva,
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+ unsigned long *gpa)
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+{
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+ unsigned long o_entryhi, o_entrylo[2], o_pagemask;
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+ unsigned int o_index;
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+ unsigned long entrylo[2], pagemask, pagemaskbit, pa;
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+ unsigned long flags;
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+ int index;
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+
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+ /* Probe the guest TLB for a mapping */
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+ local_irq_save(flags);
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+ /* Set root GuestID for root probe of guest TLB entry */
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+ htw_stop();
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+ set_root_gid_to_guest_gid();
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+
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+ o_entryhi = read_gc0_entryhi();
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+ o_index = read_gc0_index();
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+
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+ write_gc0_entryhi((o_entryhi & 0x3ff) | (gva & ~0xfffl));
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+ mtc0_tlbw_hazard();
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+ guest_tlb_probe();
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+ tlb_probe_hazard();
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+
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+ index = read_gc0_index();
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+ if (index < 0) {
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+ /* No match, fail */
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+ write_gc0_entryhi(o_entryhi);
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+ write_gc0_index(o_index);
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+
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+ clear_root_gid();
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+ htw_start();
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+ local_irq_restore(flags);
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+ return -EFAULT;
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+ }
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+
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+ /* Match! read the TLB entry */
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+ o_entrylo[0] = read_gc0_entrylo0();
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+ o_entrylo[1] = read_gc0_entrylo1();
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+ o_pagemask = read_gc0_pagemask();
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+
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+ mtc0_tlbr_hazard();
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+ guest_tlb_read();
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+ tlb_read_hazard();
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+
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+ entrylo[0] = read_gc0_entrylo0();
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+ entrylo[1] = read_gc0_entrylo1();
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+ pagemask = ~read_gc0_pagemask() & ~0x1fffl;
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+
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+ write_gc0_entryhi(o_entryhi);
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+ write_gc0_index(o_index);
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+ write_gc0_entrylo0(o_entrylo[0]);
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+ write_gc0_entrylo1(o_entrylo[1]);
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+ write_gc0_pagemask(o_pagemask);
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+
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+ clear_root_gid();
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+ htw_start();
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+ local_irq_restore(flags);
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+
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+ /* Select one of the EntryLo values and interpret the GPA */
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+ pagemaskbit = (pagemask ^ (pagemask & (pagemask - 1))) >> 1;
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+ pa = entrylo[!!(gva & pagemaskbit)];
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+
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+ /*
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+ * TLB entry may have become invalid since TLB probe if physical FTLB
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+ * entries are shared between threads (e.g. I6400).
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+ */
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+ if (!(pa & ENTRYLO_V))
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+ return -EFAULT;
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+
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+ /*
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+ * Note, this doesn't take guest MIPS32 XPA into account, where PFN is
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+ * split with XI/RI in the middle.
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+ */
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+ pa = (pa << 6) & ~0xfffl;
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+ pa |= gva & ~(pagemask | pagemaskbit);
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+
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+ *gpa = pa;
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(kvm_vz_guest_tlb_lookup);
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+
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+/**
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+ * kvm_vz_local_flush_roottlb_all_guests() - Flush all root TLB entries for
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+ * guests.
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+ *
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+ * Invalidate all entries in root tlb which are GPA mappings.
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+ */
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+void kvm_vz_local_flush_roottlb_all_guests(void)
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+{
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+ unsigned long flags;
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+ unsigned long old_entryhi, old_pagemask, old_guestctl1;
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+ int entry;
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+
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+ if (WARN_ON(!cpu_has_guestid))
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+ return;
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+
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+ local_irq_save(flags);
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+ htw_stop();
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+
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+ /* TLBR may clobber EntryHi.ASID, PageMask, and GuestCtl1.RID */
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+ old_entryhi = read_c0_entryhi();
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+ old_pagemask = read_c0_pagemask();
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+ old_guestctl1 = read_c0_guestctl1();
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+
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+ /*
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+ * Invalidate guest entries in root TLB while leaving root entries
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+ * intact when possible.
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+ */
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+ for (entry = 0; entry < current_cpu_data.tlbsize; entry++) {
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+ write_c0_index(entry);
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+ mtc0_tlbw_hazard();
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+ tlb_read();
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+ tlb_read_hazard();
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+
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+ /* Don't invalidate non-guest (RVA) mappings in the root TLB */
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+ if (!(read_c0_guestctl1() & MIPS_GCTL1_RID))
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+ continue;
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+
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+ /* Make sure all entries differ. */
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+ write_c0_entryhi(UNIQUE_ENTRYHI(entry));
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+ write_c0_entrylo0(0);
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+ write_c0_entrylo1(0);
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+ write_c0_guestctl1(0);
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+ mtc0_tlbw_hazard();
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+ tlb_write_indexed();
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+ }
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+
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+ write_c0_entryhi(old_entryhi);
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+ write_c0_pagemask(old_pagemask);
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+ write_c0_guestctl1(old_guestctl1);
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+ tlbw_use_hazard();
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+
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+ htw_start();
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+ local_irq_restore(flags);
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+}
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+EXPORT_SYMBOL_GPL(kvm_vz_local_flush_roottlb_all_guests);
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+
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+/**
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+ * kvm_vz_local_flush_guesttlb_all() - Flush all guest TLB entries.
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+ *
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+ * Invalidate all entries in guest tlb irrespective of guestid.
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+ */
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+void kvm_vz_local_flush_guesttlb_all(void)
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+{
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+ unsigned long flags;
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+ unsigned long old_index;
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+ unsigned long old_entryhi;
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+ unsigned long old_entrylo[2];
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+ unsigned long old_pagemask;
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+ int entry;
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+
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+ local_irq_save(flags);
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+
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+ /* Preserve all clobbered guest registers */
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+ old_index = read_gc0_index();
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+ old_entryhi = read_gc0_entryhi();
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+ old_entrylo[0] = read_gc0_entrylo0();
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+ old_entrylo[1] = read_gc0_entrylo1();
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+ old_pagemask = read_gc0_pagemask();
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+
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+ /* Invalidate guest entries in guest TLB */
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+ write_gc0_entrylo0(0);
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+ write_gc0_entrylo1(0);
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+ write_gc0_pagemask(0);
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+ for (entry = 0; entry < current_cpu_data.guest.tlbsize; entry++) {
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+ /* Make sure all entries differ. */
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+ write_gc0_index(entry);
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+ write_gc0_entryhi(UNIQUE_GUEST_ENTRYHI(entry));
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+ mtc0_tlbw_hazard();
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+ guest_tlb_write_indexed();
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+ }
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+ write_gc0_index(old_index);
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+ write_gc0_entryhi(old_entryhi);
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+ write_gc0_entrylo0(old_entrylo[0]);
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+ write_gc0_entrylo1(old_entrylo[1]);
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+ write_gc0_pagemask(old_pagemask);
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+ tlbw_use_hazard();
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+
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+ local_irq_restore(flags);
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+}
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+EXPORT_SYMBOL_GPL(kvm_vz_local_flush_guesttlb_all);
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+
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+/**
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+ * kvm_vz_save_guesttlb() - Save a range of guest TLB entries.
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+ * @buf: Buffer to write TLB entries into.
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+ * @index: Start index.
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+ * @count: Number of entries to save.
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+ *
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+ * Save a range of guest TLB entries. The caller must ensure interrupts are
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+ * disabled.
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+ */
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+void kvm_vz_save_guesttlb(struct kvm_mips_tlb *buf, unsigned int index,
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+ unsigned int count)
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+{
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+ unsigned int end = index + count;
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+ unsigned long old_entryhi, old_entrylo0, old_entrylo1, old_pagemask;
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+ unsigned int guestctl1 = 0;
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+ int old_index, i;
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+
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+ /* Save registers we're about to clobber */
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+ old_index = read_gc0_index();
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+ old_entryhi = read_gc0_entryhi();
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+ old_entrylo0 = read_gc0_entrylo0();
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+ old_entrylo1 = read_gc0_entrylo1();
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+ old_pagemask = read_gc0_pagemask();
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+
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+ /* Set root GuestID for root probe */
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+ htw_stop();
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+ set_root_gid_to_guest_gid();
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+ if (cpu_has_guestid)
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+ guestctl1 = read_c0_guestctl1();
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+
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+ /* Read each entry from guest TLB */
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+ for (i = index; i < end; ++i, ++buf) {
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+ write_gc0_index(i);
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+
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+ mtc0_tlbr_hazard();
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+ guest_tlb_read();
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+ tlb_read_hazard();
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+
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+ if (cpu_has_guestid &&
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+ (read_c0_guestctl1() ^ guestctl1) & MIPS_GCTL1_RID) {
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+ /* Entry invalid or belongs to another guest */
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+ buf->tlb_hi = UNIQUE_GUEST_ENTRYHI(i);
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+ buf->tlb_lo[0] = 0;
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+ buf->tlb_lo[1] = 0;
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+ buf->tlb_mask = 0;
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+ } else {
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+ /* Entry belongs to the right guest */
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+ buf->tlb_hi = read_gc0_entryhi();
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+ buf->tlb_lo[0] = read_gc0_entrylo0();
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+ buf->tlb_lo[1] = read_gc0_entrylo1();
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+ buf->tlb_mask = read_gc0_pagemask();
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+ }
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+ }
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+
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+ /* Clear root GuestID again */
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+ clear_root_gid();
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+ htw_start();
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+
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+ /* Restore clobbered registers */
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+ write_gc0_index(old_index);
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+ write_gc0_entryhi(old_entryhi);
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+ write_gc0_entrylo0(old_entrylo0);
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+ write_gc0_entrylo1(old_entrylo1);
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+ write_gc0_pagemask(old_pagemask);
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+
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+ tlbw_use_hazard();
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+}
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+EXPORT_SYMBOL_GPL(kvm_vz_save_guesttlb);
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+
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+/**
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+ * kvm_vz_load_guesttlb() - Save a range of guest TLB entries.
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+ * @buf: Buffer to read TLB entries from.
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+ * @index: Start index.
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+ * @count: Number of entries to load.
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+ *
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+ * Load a range of guest TLB entries. The caller must ensure interrupts are
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+ * disabled.
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+ */
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+void kvm_vz_load_guesttlb(const struct kvm_mips_tlb *buf, unsigned int index,
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+ unsigned int count)
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+{
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+ unsigned int end = index + count;
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+ unsigned long old_entryhi, old_entrylo0, old_entrylo1, old_pagemask;
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+ int old_index, i;
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+
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+ /* Save registers we're about to clobber */
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+ old_index = read_gc0_index();
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+ old_entryhi = read_gc0_entryhi();
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+ old_entrylo0 = read_gc0_entrylo0();
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+ old_entrylo1 = read_gc0_entrylo1();
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+ old_pagemask = read_gc0_pagemask();
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+
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+ /* Set root GuestID for root probe */
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+ htw_stop();
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+ set_root_gid_to_guest_gid();
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+
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+ /* Write each entry to guest TLB */
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+ for (i = index; i < end; ++i, ++buf) {
|
|
|
+ write_gc0_index(i);
|
|
|
+ write_gc0_entryhi(buf->tlb_hi);
|
|
|
+ write_gc0_entrylo0(buf->tlb_lo[0]);
|
|
|
+ write_gc0_entrylo1(buf->tlb_lo[1]);
|
|
|
+ write_gc0_pagemask(buf->tlb_mask);
|
|
|
+
|
|
|
+ mtc0_tlbw_hazard();
|
|
|
+ guest_tlb_write_indexed();
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Clear root GuestID again */
|
|
|
+ clear_root_gid();
|
|
|
+ htw_start();
|
|
|
+
|
|
|
+ /* Restore clobbered registers */
|
|
|
+ write_gc0_index(old_index);
|
|
|
+ write_gc0_entryhi(old_entryhi);
|
|
|
+ write_gc0_entrylo0(old_entrylo0);
|
|
|
+ write_gc0_entrylo1(old_entrylo1);
|
|
|
+ write_gc0_pagemask(old_pagemask);
|
|
|
+
|
|
|
+ tlbw_use_hazard();
|
|
|
+}
|
|
|
+EXPORT_SYMBOL_GPL(kvm_vz_load_guesttlb);
|
|
|
+
|
|
|
+#endif
|
|
|
+
|
|
|
/**
|
|
|
* kvm_mips_suspend_mm() - Suspend the active mm.
|
|
|
* @cpu The CPU we're running on.
|