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@@ -621,8 +621,8 @@ static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc)
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u32 crystalfreq;
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const struct pmu0_plltab_entry *e = NULL;
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- crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
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- SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
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+ crystalfreq = (chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
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+ SSB_CHIPCO_PMU_CTL_XTALFREQ) >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
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e = pmu0_plltab_find_entry(crystalfreq);
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BUG_ON(!e);
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return e->freq * 1000;
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@@ -634,7 +634,7 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
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switch (bus->chip_id) {
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case 0x5354:
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- ssb_pmu_get_alp_clock_clk0(cc);
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+ return ssb_pmu_get_alp_clock_clk0(cc);
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default:
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ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
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bus->chip_id);
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