|
@@ -49,6 +49,7 @@ static const char * const decon_clks_name[] = {
|
|
|
|
|
|
enum decon_flag_bits {
|
|
enum decon_flag_bits {
|
|
BIT_CLKS_ENABLED,
|
|
BIT_CLKS_ENABLED,
|
|
|
|
+ BIT_IRQS_ENABLED,
|
|
BIT_WIN_UPDATED,
|
|
BIT_WIN_UPDATED,
|
|
BIT_SUSPENDED
|
|
BIT_SUSPENDED
|
|
};
|
|
};
|
|
@@ -104,6 +105,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
|
|
val |= VIDINTCON0_INTFRMEN | VIDINTCON0_FRAMESEL_FP;
|
|
val |= VIDINTCON0_INTFRMEN | VIDINTCON0_FRAMESEL_FP;
|
|
|
|
|
|
writel(val, ctx->addr + DECON_VIDINTCON0);
|
|
writel(val, ctx->addr + DECON_VIDINTCON0);
|
|
|
|
+ set_bit(BIT_IRQS_ENABLED, &ctx->flags);
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
@@ -112,6 +114,7 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
|
|
{
|
|
{
|
|
struct decon_context *ctx = crtc->ctx;
|
|
struct decon_context *ctx = crtc->ctx;
|
|
|
|
|
|
|
|
+ clear_bit(BIT_IRQS_ENABLED, &ctx->flags);
|
|
if (test_bit(BIT_SUSPENDED, &ctx->flags))
|
|
if (test_bit(BIT_SUSPENDED, &ctx->flags))
|
|
return;
|
|
return;
|
|
|
|
|
|
@@ -518,7 +521,8 @@ static void decon_te_irq_handler(struct exynos_drm_crtc *crtc)
|
|
(ctx->out_type & I80_HW_TRG))
|
|
(ctx->out_type & I80_HW_TRG))
|
|
return;
|
|
return;
|
|
|
|
|
|
- if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags))
|
|
|
|
|
|
+ if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags) ||
|
|
|
|
+ test_bit(BIT_IRQS_ENABLED, &ctx->flags))
|
|
decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
|
|
decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
|
|
}
|
|
}
|
|
|
|
|