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@@ -437,9 +437,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
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spin_lock_irqsave(&xuartps->port->lock, flags);
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spin_lock_irqsave(&xuartps->port->lock, flags);
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/* Disable the TX and RX to set baud rate */
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/* Disable the TX and RX to set baud rate */
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- xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
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- (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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spin_unlock_irqrestore(&xuartps->port->lock, flags);
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spin_unlock_irqrestore(&xuartps->port->lock, flags);
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@@ -464,9 +464,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
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spin_lock_irqsave(&xuartps->port->lock, flags);
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spin_lock_irqsave(&xuartps->port->lock, flags);
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/* Set TX/RX Reset */
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/* Set TX/RX Reset */
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- xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
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- (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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while (xuartps_readl(XUARTPS_CR_OFFSET) &
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while (xuartps_readl(XUARTPS_CR_OFFSET) &
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(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
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(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
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@@ -479,10 +479,9 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
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*/
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*/
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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- xuartps_writel(
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- (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
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- (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
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+ ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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spin_unlock_irqrestore(&xuartps->port->lock, flags);
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spin_unlock_irqrestore(&xuartps->port->lock, flags);
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@@ -631,9 +630,9 @@ static void xuartps_set_termios(struct uart_port *port,
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}
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}
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/* Disable the TX and RX to set baud rate */
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/* Disable the TX and RX to set baud rate */
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- xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
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- (XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg |= XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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/*
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/*
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* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk
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* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk
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@@ -651,20 +650,18 @@ static void xuartps_set_termios(struct uart_port *port,
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uart_update_timeout(port, termios->c_cflag, baud);
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uart_update_timeout(port, termios->c_cflag, baud);
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/* Set TX/RX Reset */
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/* Set TX/RX Reset */
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- xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
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- (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
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- XUARTPS_CR_OFFSET);
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-
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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/*
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/*
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* Clear the RX disable and TX disable bits and then set the TX enable
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* Clear the RX disable and TX disable bits and then set the TX enable
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* bit and RX enable bit to enable the transmitter and receiver.
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* bit and RX enable bit to enable the transmitter and receiver.
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*/
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*/
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- xuartps_writel(
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- (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS))
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- | (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
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+ ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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@@ -1248,9 +1245,9 @@ static int xuartps_resume(struct device *device)
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spin_lock_irqsave(&port->lock, flags);
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spin_lock_irqsave(&port->lock, flags);
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/* Set TX/RX Reset */
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/* Set TX/RX Reset */
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- xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
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- (XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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+ ctrl_reg |= XUARTPS_CR_TXRST | XUARTPS_CR_RXRST;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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while (xuartps_readl(XUARTPS_CR_OFFSET) &
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while (xuartps_readl(XUARTPS_CR_OFFSET) &
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(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
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(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
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cpu_relax();
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cpu_relax();
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@@ -1259,10 +1256,9 @@ static int xuartps_resume(struct device *device)
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
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/* Enable Tx/Rx */
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/* Enable Tx/Rx */
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
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- xuartps_writel(
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- (ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
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- (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
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- XUARTPS_CR_OFFSET);
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+ ctrl_reg &= ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS);
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+ ctrl_reg |= XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN;
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+ xuartps_writel(ctrl_reg, XUARTPS_CR_OFFSET);
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spin_unlock_irqrestore(&port->lock, flags);
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spin_unlock_irqrestore(&port->lock, flags);
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} else {
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} else {
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