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@@ -21,10 +21,13 @@
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#include <plat/mtm.h>
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#include <plat/smp.h>
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-#define MT_CTRL_HS_CNT 0xFF
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+#define MT_HS_CNT_MIN 0x01
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+#define MT_HS_CNT_MAX 0xFF
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#define MT_CTRL_ST_CNT 0xF
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#define NPS_NUM_HW_THREADS 0x10
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+static int mtm_hs_ctr = MT_HS_CNT_MAX;
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+
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#ifdef CONFIG_EZNPS_MEM_ERROR_ALIGN
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int do_memory_error(unsigned long address, struct pt_regs *regs)
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{
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@@ -127,7 +130,7 @@ void mtm_enable_core(unsigned int cpu)
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/* Enable HW schedule, stall counter, mtm */
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mt_ctrl.value = 0;
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mt_ctrl.hsen = 1;
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- mt_ctrl.hs_cnt = MT_CTRL_HS_CNT;
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+ mt_ctrl.hs_cnt = mtm_hs_ctr;
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mt_ctrl.mten = 1;
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write_aux_reg(CTOP_AUX_MT_CTRL, mt_ctrl.value);
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@@ -138,3 +141,23 @@ void mtm_enable_core(unsigned int cpu)
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*/
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cpu_relax();
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}
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+
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+/* Verify and set the value of the mtm hs counter */
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+static int __init set_mtm_hs_ctr(char *ctr_str)
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+{
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+ long hs_ctr;
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+ int ret;
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+
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+ ret = kstrtol(ctr_str, 0, &hs_ctr);
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+
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+ if (ret || hs_ctr > MT_HS_CNT_MAX || hs_ctr < MT_HS_CNT_MIN) {
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+ pr_err("** Invalid @nps_mtm_hs_ctr [%d] needs to be [%d:%d] (incl)\n",
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+ hs_ctr, MT_HS_CNT_MIN, MT_HS_CNT_MAX);
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+ return -EINVAL;
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+ }
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+
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+ mtm_hs_ctr = hs_ctr;
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+
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+ return 0;
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+}
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+early_param("nps_mtm_hs_ctr", set_mtm_hs_ctr);
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