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@@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel.
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Required properties:
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- compatible: should be "socionext,uniphier-scssi"
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- reg: address and length of the spi master registers
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- - #address-cells: must be <1>, see spi-bus.txt
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- - #size-cells: must be <0>, see spi-bus.txt
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- - clocks: A phandle to the clock for the device.
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- - resets: A phandle to the reset control for the device.
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+ - interrupts: a single interrupt specifier
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+ - pinctrl-names: should be "default"
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+ - pinctrl-0: pin control state for the default mode
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+ - clocks: a phandle to the clock for the device
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+ - resets: a phandle to the reset control for the device
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Example:
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spi0: spi@54006000 {
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compatible = "socionext,uniphier-scssi";
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reg = <0x54006000 0x100>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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+ interrupts = <0 39 4>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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};
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