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@@ -87,7 +87,7 @@ void __init MMU_init_hw(void)
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#endif
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}
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-static void mmu_mapin_immr(void)
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+static void __init mmu_mapin_immr(void)
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{
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unsigned long p = PHYS_IMMR_BASE;
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unsigned long v = VIRT_IMMR_BASE;
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@@ -107,7 +107,7 @@ extern unsigned int DTLBMiss_cmp, FixupDAR_cmp;
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extern unsigned int ITLBMiss_cmp;
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#endif
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-void mmu_patch_cmp_limit(unsigned int *addr, unsigned long mapped)
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+static void __init mmu_patch_cmp_limit(unsigned int *addr, unsigned long mapped)
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{
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unsigned int instr = *addr;
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@@ -151,8 +151,8 @@ unsigned long __init mmu_mapin_ram(unsigned long top)
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return mapped;
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}
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-void setup_initial_memory_limit(phys_addr_t first_memblock_base,
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- phys_addr_t first_memblock_size)
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+void __init setup_initial_memory_limit(phys_addr_t first_memblock_base,
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+ phys_addr_t first_memblock_size)
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{
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/* We don't currently support the first MEMBLOCK not mapping 0
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* physical on those processors
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