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@@ -1410,10 +1410,8 @@ static void gfx_v9_0_rlc_start(struct amdgpu_device *adev)
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#ifdef AMDGPU_RLC_DEBUG_RETRY
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u32 rlc_ucode_ver;
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#endif
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- u32 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CNTL));
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- tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 1);
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- WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CNTL), tmp);
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+ WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);
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/* carrizo do enable cp interrupt after cp inited */
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if (!(adev->flags & AMD_IS_APU))
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