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@@ -104,7 +104,6 @@ __do_hyp_init:
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@ - Write permission implies XN: disabled
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@ - Instruction cache: enabled
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@ - Data/Unified cache: enabled
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- @ - Memory alignment checks: enabled
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@ - MMU: enabled (this code must be run from an identity mapping)
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mrc p15, 4, r0, c1, c0, 0 @ HSCR
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ldr r2, =HSCTLR_MASK
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@@ -112,8 +111,8 @@ __do_hyp_init:
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mrc p15, 0, r1, c1, c0, 0 @ SCTLR
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ldr r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C)
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and r1, r1, r2
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- ARM( ldr r2, =(HSCTLR_M | HSCTLR_A) )
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- THUMB( ldr r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE) )
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+ ARM( ldr r2, =(HSCTLR_M) )
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+ THUMB( ldr r2, =(HSCTLR_M | HSCTLR_TE) )
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orr r1, r1, r2
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orr r0, r0, r1
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mcr p15, 4, r0, c1, c0, 0 @ HSCR
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