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@@ -2075,6 +2075,70 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
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},
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};
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+/* uart7 */
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+static struct omap_hwmod dra7xx_uart7_hwmod = {
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+ .name = "uart7",
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+ .class = &dra7xx_uart_hwmod_class,
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+ .clkdm_name = "l4per2_clkdm",
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+ .main_clk = "uart7_gfclk_mux",
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+ .flags = HWMOD_SWSUP_SIDLE_ACT,
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = DRA7XX_CM_L4PER2_UART7_CLKCTRL_OFFSET,
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+ .context_offs = DRA7XX_RM_L4PER2_UART7_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_SWCTRL,
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+ },
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+ },
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+};
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+
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+/* uart8 */
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+static struct omap_hwmod dra7xx_uart8_hwmod = {
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+ .name = "uart8",
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+ .class = &dra7xx_uart_hwmod_class,
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+ .clkdm_name = "l4per2_clkdm",
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+ .main_clk = "uart8_gfclk_mux",
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+ .flags = HWMOD_SWSUP_SIDLE_ACT,
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = DRA7XX_CM_L4PER2_UART8_CLKCTRL_OFFSET,
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+ .context_offs = DRA7XX_RM_L4PER2_UART8_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_SWCTRL,
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+ },
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+ },
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+};
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+
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+/* uart9 */
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+static struct omap_hwmod dra7xx_uart9_hwmod = {
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+ .name = "uart9",
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+ .class = &dra7xx_uart_hwmod_class,
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+ .clkdm_name = "l4per2_clkdm",
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+ .main_clk = "uart9_gfclk_mux",
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+ .flags = HWMOD_SWSUP_SIDLE_ACT,
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = DRA7XX_CM_L4PER2_UART9_CLKCTRL_OFFSET,
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+ .context_offs = DRA7XX_RM_L4PER2_UART9_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_SWCTRL,
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+ },
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+ },
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+};
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+
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+/* uart10 */
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+static struct omap_hwmod dra7xx_uart10_hwmod = {
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+ .name = "uart10",
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+ .class = &dra7xx_uart_hwmod_class,
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+ .clkdm_name = "wkupaon_clkdm",
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+ .main_clk = "uart10_gfclk_mux",
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+ .flags = HWMOD_SWSUP_SIDLE_ACT,
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = DRA7XX_CM_WKUPAON_UART10_CLKCTRL_OFFSET,
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+ .context_offs = DRA7XX_RM_WKUPAON_UART10_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_SWCTRL,
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+ },
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+ },
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+};
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+
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/*
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* 'usb_otg_ss' class
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*
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@@ -3095,6 +3159,38 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__uart6 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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+/* l4_per2 -> uart7 */
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+static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = {
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+ .master = &dra7xx_l4_per2_hwmod,
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+ .slave = &dra7xx_uart7_hwmod,
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+ .clk = "l3_iclk_div",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_per2 -> uart8 */
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+static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = {
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+ .master = &dra7xx_l4_per2_hwmod,
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+ .slave = &dra7xx_uart8_hwmod,
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+ .clk = "l3_iclk_div",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_per2 -> uart9 */
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+static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart9 = {
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+ .master = &dra7xx_l4_per2_hwmod,
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+ .slave = &dra7xx_uart9_hwmod,
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+ .clk = "l3_iclk_div",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_wkup -> uart10 */
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+static struct omap_hwmod_ocp_if dra7xx_l4_wkup__uart10 = {
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+ .master = &dra7xx_l4_wkup_hwmod,
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+ .slave = &dra7xx_uart10_hwmod,
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+ .clk = "wkupaon_iclk_mux",
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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/* l4_per3 -> usb_otg_ss1 */
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static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = {
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.master = &dra7xx_l4_per3_hwmod,
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@@ -3259,6 +3355,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
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&dra7xx_l4_per1__uart4,
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&dra7xx_l4_per1__uart5,
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&dra7xx_l4_per1__uart6,
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+ &dra7xx_l4_per2__uart7,
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+ &dra7xx_l4_per2__uart8,
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+ &dra7xx_l4_per2__uart9,
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+ &dra7xx_l4_wkup__uart10,
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&dra7xx_l4_per3__usb_otg_ss1,
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&dra7xx_l4_per3__usb_otg_ss2,
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&dra7xx_l4_per3__usb_otg_ss3,
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Ambresh K