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@@ -20,16 +20,16 @@
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#define SEAD_CONFIG_BASE 0x1b100110
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#define SEAD_CONFIG_SIZE 4
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-static unsigned long sead3_config_reg;
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+static void __iomem *sead3_config_reg;
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void __init arch_init_irq(void)
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{
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if (!cpu_has_veic)
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mips_cpu_irq_init();
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- sead3_config_reg = (unsigned long)ioremap_nocache(SEAD_CONFIG_BASE,
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- SEAD_CONFIG_SIZE);
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- gic_present = (REG32(sead3_config_reg) & SEAD_CONFIG_GIC_PRESENT_MSK) >>
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+ sead3_config_reg = ioremap_nocache(SEAD_CONFIG_BASE, SEAD_CONFIG_SIZE);
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+ gic_present = (__raw_readl(sead3_config_reg) &
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+ SEAD_CONFIG_GIC_PRESENT_MSK) >>
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SEAD_CONFIG_GIC_PRESENT_SHF;
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pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
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pr_info("EIC: %s\n",
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