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@@ -29,7 +29,6 @@
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <mach/platform.h>
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-#include <mach/irqs.h>
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#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
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#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
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#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
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#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
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@@ -371,61 +370,16 @@ static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
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static int lpc32xx_gpio_to_irq_p01(struct gpio_chip *chip, unsigned offset)
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static int lpc32xx_gpio_to_irq_p01(struct gpio_chip *chip, unsigned offset)
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{
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{
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- return IRQ_LPC32XX_P0_P1_IRQ;
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+ return -ENXIO;
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}
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}
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-static const char lpc32xx_gpio_to_irq_gpio_p3_table[] = {
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- IRQ_LPC32XX_GPIO_00,
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- IRQ_LPC32XX_GPIO_01,
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- IRQ_LPC32XX_GPIO_02,
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- IRQ_LPC32XX_GPIO_03,
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- IRQ_LPC32XX_GPIO_04,
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- IRQ_LPC32XX_GPIO_05,
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-};
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-
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static int lpc32xx_gpio_to_irq_gpio_p3(struct gpio_chip *chip, unsigned offset)
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static int lpc32xx_gpio_to_irq_gpio_p3(struct gpio_chip *chip, unsigned offset)
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{
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{
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- if (offset < ARRAY_SIZE(lpc32xx_gpio_to_irq_gpio_p3_table))
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- return lpc32xx_gpio_to_irq_gpio_p3_table[offset];
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return -ENXIO;
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return -ENXIO;
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}
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}
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-static const char lpc32xx_gpio_to_irq_gpi_p3_table[] = {
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- IRQ_LPC32XX_GPI_00,
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- IRQ_LPC32XX_GPI_01,
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- IRQ_LPC32XX_GPI_02,
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- IRQ_LPC32XX_GPI_03,
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- IRQ_LPC32XX_GPI_04,
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- IRQ_LPC32XX_GPI_05,
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- IRQ_LPC32XX_GPI_06,
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- IRQ_LPC32XX_GPI_07,
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- IRQ_LPC32XX_GPI_08,
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- IRQ_LPC32XX_GPI_09,
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- -ENXIO, /* 10 */
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- -ENXIO, /* 11 */
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- -ENXIO, /* 12 */
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- -ENXIO, /* 13 */
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- -ENXIO, /* 14 */
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- -ENXIO, /* 15 */
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- -ENXIO, /* 16 */
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- -ENXIO, /* 17 */
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- -ENXIO, /* 18 */
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- IRQ_LPC32XX_GPI_19,
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- -ENXIO, /* 20 */
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- -ENXIO, /* 21 */
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- -ENXIO, /* 22 */
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- -ENXIO, /* 23 */
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- -ENXIO, /* 24 */
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- -ENXIO, /* 25 */
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- -ENXIO, /* 26 */
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- -ENXIO, /* 27 */
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- IRQ_LPC32XX_GPI_28,
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-};
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-
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static int lpc32xx_gpio_to_irq_gpi_p3(struct gpio_chip *chip, unsigned offset)
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static int lpc32xx_gpio_to_irq_gpi_p3(struct gpio_chip *chip, unsigned offset)
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{
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{
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- if (offset < ARRAY_SIZE(lpc32xx_gpio_to_irq_gpi_p3_table))
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- return lpc32xx_gpio_to_irq_gpi_p3_table[offset];
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return -ENXIO;
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return -ENXIO;
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}
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}
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