There are four clocks that vop module would need to operate: DCLK_VOP, HCLK_VOP, SCLK_VOP, ACLK_VOP, Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
@@ -50,10 +50,15 @@
#define SCLK_SDMMC_SAMPLE 118
#define SCLK_SDIO_SAMPLE 119
#define SCLK_EMMC_SAMPLE 121
+#define SCLK_VOP 122
+
+/* dclk gates */
+#define DCLK_VOP 190
/* aclk gates */
#define ACLK_DMAC 194
#define ACLK_PERI 210
+#define ACLK_VOP 211
/* pclk gates */
#define PCLK_GPIO0 320
@@ -75,6 +80,7 @@
#define PCLK_PERI 363
/* hclk gates */
+#define HCLK_VOP 452
#define HCLK_NANDC 453
#define HCLK_SDMMC 456
#define HCLK_SDIO 457