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@@ -4673,11 +4673,9 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
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struct drm_atomic_state *old_state = old_crtc_state->base.state;
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- struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc->base.state);
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struct drm_device *dev = crtc->base.dev;
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- struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_plane *primary = crtc->base.primary;
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struct drm_plane_state *old_pri_state =
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drm_atomic_get_existing_plane_state(old_state, primary);
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@@ -4689,22 +4687,19 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
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if (pipe_config->update_wm_post && pipe_config->base.active)
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intel_update_watermarks(&crtc->base);
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- if (atomic->update_fbc)
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- intel_fbc_post_update(crtc);
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-
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if (old_pri_state) {
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struct intel_plane_state *primary_state =
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to_intel_plane_state(primary->state);
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struct intel_plane_state *old_primary_state =
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to_intel_plane_state(old_pri_state);
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+ intel_fbc_post_update(crtc);
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+
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if (primary_state->visible &&
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(needs_modeset(&pipe_config->base) ||
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!old_primary_state->visible))
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intel_post_enable_primary(&crtc->base);
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}
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-
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- memset(atomic, 0, sizeof(*atomic));
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}
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static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
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@@ -4712,7 +4707,6 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
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struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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- struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc->base.state);
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struct drm_atomic_state *old_state = old_crtc_state->base.state;
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@@ -4721,15 +4715,14 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state)
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drm_atomic_get_existing_plane_state(old_state, primary);
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bool modeset = needs_modeset(&pipe_config->base);
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- if (atomic->update_fbc)
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- intel_fbc_pre_update(crtc);
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-
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if (old_pri_state) {
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struct intel_plane_state *primary_state =
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to_intel_plane_state(primary->state);
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struct intel_plane_state *old_primary_state =
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to_intel_plane_state(old_pri_state);
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+ intel_fbc_pre_update(crtc);
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+
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if (old_primary_state->visible &&
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(modeset || !primary_state->visible))
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intel_pre_disable_primary(&crtc->base);
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@@ -11847,27 +11840,17 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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if (visible || was_visible)
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pipe_config->fb_bits |= to_intel_plane(plane)->frontbuffer_bit;
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- switch (plane->type) {
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- case DRM_PLANE_TYPE_PRIMARY:
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- intel_crtc->atomic.update_fbc = true;
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-
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- break;
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- case DRM_PLANE_TYPE_CURSOR:
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- break;
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- case DRM_PLANE_TYPE_OVERLAY:
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- /*
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- * WaCxSRDisabledForSpriteScaling:ivb
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- *
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- * cstate->update_wm was already set above, so this flag will
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- * take effect when we commit and program watermarks.
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- */
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- if (IS_IVYBRIDGE(dev) &&
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- needs_scaling(to_intel_plane_state(plane_state)) &&
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- !needs_scaling(old_plane_state))
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- pipe_config->disable_lp_wm = true;
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+ /*
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+ * WaCxSRDisabledForSpriteScaling:ivb
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+ *
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+ * cstate->update_wm was already set above, so this flag will
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+ * take effect when we commit and program watermarks.
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+ */
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+ if (plane->type == DRM_PLANE_TYPE_OVERLAY && IS_IVYBRIDGE(dev) &&
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+ needs_scaling(to_intel_plane_state(plane_state)) &&
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+ !needs_scaling(old_plane_state))
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+ pipe_config->disable_lp_wm = true;
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- break;
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- }
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return 0;
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}
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@@ -13310,9 +13293,6 @@ static int intel_atomic_check(struct drm_device *dev,
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc_state);
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- memset(&to_intel_crtc(crtc)->atomic, 0,
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- sizeof(struct intel_crtc_atomic_commit));
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-
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/* Catch I915_MODE_FLAG_INHERITED */
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if (crtc_state->mode.private_flags != crtc->state->mode.private_flags)
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crtc_state->mode_changed = true;
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@@ -13621,7 +13601,8 @@ static int intel_atomic_commit(struct drm_device *dev,
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if (!modeset)
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intel_pre_plane_update(to_intel_crtc_state(old_crtc_state));
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- if (crtc->state->active && intel_crtc->atomic.update_fbc)
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+ if (crtc->state->active &&
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+ drm_atomic_get_existing_plane_state(state, crtc->primary))
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intel_fbc_enable(intel_crtc);
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if (crtc->state->active &&
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