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@@ -534,29 +534,29 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_PREPARE:
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break;
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case SND_SOC_BIAS_STANDBY:
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- /* Switch off PLL */
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- snd_soc_update_bits(codec, AIC32X4_PLLPR,
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- AIC32X4_PLLEN, 0);
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-
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- /* Switch off NDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_NDAC,
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- AIC32X4_NDACEN, 0);
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+ /* Switch off BCLK_N Divider */
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+ snd_soc_update_bits(codec, AIC32X4_BCLKN,
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+ AIC32X4_BCLKEN, 0);
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- /* Switch off MDAC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MDAC,
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- AIC32X4_MDACEN, 0);
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+ /* Switch off MADC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MADC,
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+ AIC32X4_MADCEN, 0);
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/* Switch off NADC Divider */
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snd_soc_update_bits(codec, AIC32X4_NADC,
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AIC32X4_NADCEN, 0);
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- /* Switch off MADC Divider */
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- snd_soc_update_bits(codec, AIC32X4_MADC,
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- AIC32X4_MADCEN, 0);
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+ /* Switch off MDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_MDAC,
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+ AIC32X4_MDACEN, 0);
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- /* Switch off BCLK_N Divider */
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- snd_soc_update_bits(codec, AIC32X4_BCLKN,
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- AIC32X4_BCLKEN, 0);
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+ /* Switch off NDAC Divider */
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+ snd_soc_update_bits(codec, AIC32X4_NDAC,
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+ AIC32X4_NDACEN, 0);
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+
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+ /* Switch off PLL */
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+ snd_soc_update_bits(codec, AIC32X4_PLLPR,
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+ AIC32X4_PLLEN, 0);
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/* Switch off master clock */
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clk_disable_unprepare(aic32x4->mclk);
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