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@@ -144,44 +144,6 @@ _GLOBAL_TOC(flush_dcache_range)
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blr
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EXPORT_SYMBOL(flush_dcache_range)
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-/*
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- * Like above, but works on non-mapped physical addresses.
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- * Use only for non-LPAR setups ! It also assumes real mode
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- * is cacheable. Used for flushing out the DART before using
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- * it as uncacheable memory
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- *
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- * flush_dcache_phys_range(unsigned long start, unsigned long stop)
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- *
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- * flush all bytes from start to stop-1 inclusive
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- */
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-_GLOBAL(flush_dcache_phys_range)
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- ld r10,PPC64_CACHES@toc(r2)
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- lwz r7,DCACHEL1BLOCKSIZE(r10) /* Get dcache block size */
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- addi r5,r7,-1
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- andc r6,r3,r5 /* round low to line bdy */
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- subf r8,r6,r4 /* compute length */
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- add r8,r8,r5 /* ensure we get enough */
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- lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */
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- srw. r8,r8,r9 /* compute line count */
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- beqlr /* nothing to do? */
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- mfmsr r5 /* Disable MMU Data Relocation */
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- ori r0,r5,MSR_DR
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- xori r0,r0,MSR_DR
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- sync
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- mtmsr r0
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- sync
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- isync
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- mtctr r8
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-0: dcbst 0,r6
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- add r6,r6,r7
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- bdnz 0b
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- sync
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- isync
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- mtmsr r5 /* Re-enable MMU Data Relocation */
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- sync
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- isync
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- blr
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-
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_GLOBAL(flush_inval_dcache_range)
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ld r10,PPC64_CACHES@toc(r2)
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lwz r7,DCACHEL1BLOCKSIZE(r10) /* Get dcache block size */
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