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+/*
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+ * Linear Technology LTC3589,LTC3589-1 regulator support
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+ *
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+ * Copyright (c) 2014 Philipp Zabel <p.zabel@pengutronix.de>, Pengutronix
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2
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+ * as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ */
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+#include <linux/i2c.h>
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+#include <linux/init.h>
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+#include <linux/interrupt.h>
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/of.h>
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+#include <linux/regmap.h>
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+#include <linux/regulator/driver.h>
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+#include <linux/regulator/of_regulator.h>
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+
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+#define DRIVER_NAME "ltc3589"
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+
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+#define LTC3589_IRQSTAT 0x02
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+#define LTC3589_SCR1 0x07
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+#define LTC3589_OVEN 0x10
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+#define LTC3589_SCR2 0x12
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+#define LTC3589_PGSTAT 0x13
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+#define LTC3589_VCCR 0x20
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+#define LTC3589_CLIRQ 0x21
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+#define LTC3589_B1DTV1 0x23
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+#define LTC3589_B1DTV2 0x24
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+#define LTC3589_VRRCR 0x25
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+#define LTC3589_B2DTV1 0x26
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+#define LTC3589_B2DTV2 0x27
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+#define LTC3589_B3DTV1 0x29
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+#define LTC3589_B3DTV2 0x2a
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+#define LTC3589_L2DTV1 0x32
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+#define LTC3589_L2DTV2 0x33
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+
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+#define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3)
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+#define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4)
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+#define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5)
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+#define LTC3589_IRQSTAT_THERMAL_WARN BIT(6)
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+#define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7)
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+
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+#define LTC3589_OVEN_SW1 BIT(0)
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+#define LTC3589_OVEN_SW2 BIT(1)
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+#define LTC3589_OVEN_SW3 BIT(2)
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+#define LTC3589_OVEN_BB_OUT BIT(3)
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+#define LTC3589_OVEN_LDO2 BIT(4)
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+#define LTC3589_OVEN_LDO3 BIT(5)
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+#define LTC3589_OVEN_LDO4 BIT(6)
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+#define LTC3589_OVEN_SW_CTRL BIT(7)
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+
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+#define LTC3589_VCCR_SW1_GO BIT(0)
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+#define LTC3589_VCCR_SW2_GO BIT(2)
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+#define LTC3589_VCCR_SW3_GO BIT(4)
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+#define LTC3589_VCCR_LDO2_GO BIT(6)
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+
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+enum ltc3589_variant {
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+ LTC3589,
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+ LTC3589_1,
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+ LTC3589_2,
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+};
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+
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+enum ltc3589_reg {
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+ LTC3589_SW1,
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+ LTC3589_SW2,
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+ LTC3589_SW3,
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+ LTC3589_BB_OUT,
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+ LTC3589_LDO1,
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+ LTC3589_LDO2,
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+ LTC3589_LDO3,
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+ LTC3589_LDO4,
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+ LTC3589_NUM_REGULATORS,
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+};
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+
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+struct ltc3589_regulator {
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+ struct regulator_desc desc;
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+
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+ /* External feedback voltage divider */
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+ unsigned int r1;
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+ unsigned int r2;
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+};
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+
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+struct ltc3589 {
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+ struct regmap *regmap;
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+ struct device *dev;
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+ enum ltc3589_variant variant;
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+ struct ltc3589_regulator regulator_descs[LTC3589_NUM_REGULATORS];
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+ struct regulator_dev *regulators[LTC3589_NUM_REGULATORS];
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+};
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+
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+static const int ltc3589_ldo4[] = {
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+ 2800000, 2500000, 1800000, 3300000,
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+};
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+
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+static const int ltc3589_12_ldo4[] = {
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+ 1200000, 1800000, 2500000, 3200000,
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+};
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+
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+static int ltc3589_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
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+{
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+ struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
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+ int sel, shift;
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+
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+ if (unlikely(ramp_delay <= 0))
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+ return -EINVAL;
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+
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+ /* VRRCR slew rate offsets are the same as VCCR go bit offsets */
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+ shift = ffs(rdev->desc->apply_bit) - 1;
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+
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+ /* The slew rate can be set to 0.88, 1.75, 3.5, or 7 mV/uS */
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+ for (sel = 0; sel < 4; sel++) {
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+ if ((880 << sel) >= ramp_delay) {
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+ return regmap_update_bits(ltc3589->regmap,
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+ LTC3589_VRRCR,
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+ 0x3 << shift, sel << shift);
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+ }
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+ }
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+ return -EINVAL;
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+}
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+
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+static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV)
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+{
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+ struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
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+ int sel;
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+
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+ sel = regulator_map_voltage_linear(rdev, uV, uV);
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+ if (sel < 0)
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+ return sel;
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+
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+ /* DTV2 register follows right after the corresponding DTV1 register */
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+ return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1,
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+ rdev->desc->vsel_mask, sel);
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+}
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+
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+static int ltc3589_set_suspend_mode(struct regulator_dev *rdev,
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+ unsigned int mode)
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+{
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+ struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
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+ int mask, bit = 0;
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+
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+ /* VCCR reference selects are right next to the VCCR go bits */
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+ mask = rdev->desc->apply_bit << 1;
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+
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+ if (mode == REGULATOR_MODE_STANDBY)
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+ bit = mask; /* Select DTV2 */
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+
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+ mask |= rdev->desc->apply_bit;
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+ bit |= rdev->desc->apply_bit;
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+ return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit);
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+}
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+
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+/* SW1, SW2, SW3, LDO2 */
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+static struct regulator_ops ltc3589_linear_regulator_ops = {
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+ .enable = regulator_enable_regmap,
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+ .disable = regulator_disable_regmap,
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+ .is_enabled = regulator_is_enabled_regmap,
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+ .list_voltage = regulator_list_voltage_linear,
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+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
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+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
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+ .set_ramp_delay = ltc3589_set_ramp_delay,
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+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
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+ .set_suspend_voltage = ltc3589_set_suspend_voltage,
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+ .set_suspend_mode = ltc3589_set_suspend_mode,
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+};
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+
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+/* BB_OUT, LDO3 */
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+static struct regulator_ops ltc3589_fixed_regulator_ops = {
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+ .enable = regulator_enable_regmap,
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+ .disable = regulator_disable_regmap,
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+ .is_enabled = regulator_is_enabled_regmap,
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+};
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+
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+/* LDO1 */
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+static struct regulator_ops ltc3589_fixed_standby_regulator_ops = {
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+};
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+
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+/* LDO4 */
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+static struct regulator_ops ltc3589_table_regulator_ops = {
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+ .enable = regulator_enable_regmap,
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+ .disable = regulator_disable_regmap,
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+ .is_enabled = regulator_is_enabled_regmap,
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+ .list_voltage = regulator_list_voltage_table,
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+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
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+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
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+};
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+
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+
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+#define LTC3589_REG(_name, _ops, en_bit, dtv1_reg, dtv_mask, go_bit) \
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+ [LTC3589_ ## _name] = { \
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+ .desc = { \
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+ .name = #_name, \
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+ .n_voltages = (dtv_mask) + 1, \
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+ .min_uV = (go_bit) ? 362500 : 0, \
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+ .uV_step = (go_bit) ? 12500 : 0, \
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+ .ramp_delay = (go_bit) ? 1750 : 0, \
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+ .fixed_uV = (dtv_mask) ? 0 : 800000, \
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+ .ops = <c3589_ ## _ops ## _regulator_ops, \
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+ .type = REGULATOR_VOLTAGE, \
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+ .id = LTC3589_ ## _name, \
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+ .owner = THIS_MODULE, \
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+ .vsel_reg = (dtv1_reg), \
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+ .vsel_mask = (dtv_mask), \
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+ .apply_reg = (go_bit) ? LTC3589_VCCR : 0, \
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+ .apply_bit = (go_bit), \
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+ .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \
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+ .enable_mask = (en_bit), \
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+ }, \
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+ }
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+
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+#define LTC3589_LINEAR_REG(_name, _dtv1) \
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+ LTC3589_REG(_name, linear, LTC3589_OVEN_ ## _name, \
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+ LTC3589_ ## _dtv1, 0x1f, \
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+ LTC3589_VCCR_ ## _name ## _GO)
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+
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+#define LTC3589_FIXED_REG(_name) \
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+ LTC3589_REG(_name, fixed, LTC3589_OVEN_ ## _name, 0, 0, 0)
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+
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+static struct ltc3589_regulator ltc3589_regulators[LTC3589_NUM_REGULATORS] = {
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+ LTC3589_LINEAR_REG(SW1, B1DTV1),
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+ LTC3589_LINEAR_REG(SW2, B2DTV1),
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+ LTC3589_LINEAR_REG(SW3, B3DTV1),
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+ LTC3589_FIXED_REG(BB_OUT),
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+ LTC3589_REG(LDO1, fixed_standby, 0, 0, 0, 0),
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+ LTC3589_LINEAR_REG(LDO2, L2DTV1),
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+ LTC3589_FIXED_REG(LDO3),
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+ LTC3589_REG(LDO4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60, 0),
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+};
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+
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+#ifdef CONFIG_OF
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+static struct of_regulator_match ltc3589_matches[LTC3589_NUM_REGULATORS] = {
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+ { .name = "sw1", },
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+ { .name = "sw2", },
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+ { .name = "sw3", },
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+ { .name = "bb-out", },
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+ { .name = "ldo1", }, /* standby */
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+ { .name = "ldo2", },
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+ { .name = "ldo3", },
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+ { .name = "ldo4", },
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+};
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+
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+static int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589)
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+{
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+ struct device *dev = ltc3589->dev;
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+ struct device_node *node;
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+ int i, ret;
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+
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+ node = of_find_node_by_name(dev->of_node, "regulators");
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+ if (!node) {
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+ dev_err(dev, "regulators node not found\n");
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+ return -EINVAL;
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+ }
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+
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+ ret = of_regulator_match(dev, node, ltc3589_matches,
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+ ARRAY_SIZE(ltc3589_matches));
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+ of_node_put(node);
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+ if (ret < 0) {
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+ dev_err(dev, "Error parsing regulator init data: %d\n", ret);
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+ return ret;
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+ }
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+ if (ret != LTC3589_NUM_REGULATORS) {
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+ dev_err(dev, "Only %d regulators described in device tree\n",
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+ ret);
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+ return -EINVAL;
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+ }
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+
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+ /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */
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+ for (i = 0; i < LTC3589_LDO3; i++) {
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+ struct ltc3589_regulator *desc = <c3589->regulator_descs[i];
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+ struct device_node *np = ltc3589_matches[i].of_node;
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+ u32 vdiv[2];
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+
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+ ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider",
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+ vdiv, 2);
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+ if (ret) {
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+ dev_err(dev, "Failed to parse voltage divider: %d\n",
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+ ret);
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+ return ret;
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+ }
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+
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+ desc->r1 = vdiv[0];
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+ desc->r2 = vdiv[1];
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+ }
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+
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+ return 0;
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+}
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+
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+static inline struct regulator_init_data *match_init_data(int index)
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+{
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+ return ltc3589_matches[index].init_data;
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+}
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+
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+static inline struct device_node *match_of_node(int index)
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+{
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+ return ltc3589_matches[index].of_node;
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+}
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+#else
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+static inline int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589)
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+{
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+ return 0;
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+}
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+
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+static inline struct regulator_init_data *match_init_data(int index)
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+{
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+ return NULL;
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+}
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+
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+static inline struct device_node *match_of_node(int index)
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+{
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+ return NULL;
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+}
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+#endif
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+
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+static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg)
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+{
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+ switch (reg) {
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+ case LTC3589_IRQSTAT:
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+ case LTC3589_SCR1:
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+ case LTC3589_OVEN:
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+ case LTC3589_SCR2:
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+ case LTC3589_VCCR:
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+ case LTC3589_CLIRQ:
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+ case LTC3589_B1DTV1:
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+ case LTC3589_B1DTV2:
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+ case LTC3589_VRRCR:
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+ case LTC3589_B2DTV1:
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+ case LTC3589_B2DTV2:
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+ case LTC3589_B3DTV1:
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+ case LTC3589_B3DTV2:
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+ case LTC3589_L2DTV1:
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+ case LTC3589_L2DTV2:
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+ return true;
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+ }
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+ return false;
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+}
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+
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+static bool ltc3589_readable_reg(struct device *dev, unsigned int reg)
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+{
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+ switch (reg) {
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+ case LTC3589_IRQSTAT:
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+ case LTC3589_SCR1:
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+ case LTC3589_OVEN:
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+ case LTC3589_SCR2:
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+ case LTC3589_PGSTAT:
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+ case LTC3589_VCCR:
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+ case LTC3589_B1DTV1:
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+ case LTC3589_B1DTV2:
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+ case LTC3589_VRRCR:
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+ case LTC3589_B2DTV1:
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+ case LTC3589_B2DTV2:
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+ case LTC3589_B3DTV1:
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+ case LTC3589_B3DTV2:
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+ case LTC3589_L2DTV1:
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+ case LTC3589_L2DTV2:
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+ return true;
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+ }
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+ return false;
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+}
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+
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+static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg)
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+{
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+ switch (reg) {
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+ case LTC3589_IRQSTAT:
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+ case LTC3589_PGSTAT:
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+ return true;
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+ }
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+ return false;
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|
|
+}
|
|
|
+
|
|
|
+struct reg_default ltc3589_reg_defaults[] = {
|
|
|
+ { LTC3589_SCR1, 0x00 },
|
|
|
+ { LTC3589_OVEN, 0x00 },
|
|
|
+ { LTC3589_SCR2, 0x00 },
|
|
|
+ { LTC3589_VCCR, 0x00 },
|
|
|
+ { LTC3589_B1DTV1, 0x19 },
|
|
|
+ { LTC3589_B1DTV2, 0x19 },
|
|
|
+ { LTC3589_VRRCR, 0xff },
|
|
|
+ { LTC3589_B2DTV1, 0x19 },
|
|
|
+ { LTC3589_B2DTV2, 0x19 },
|
|
|
+ { LTC3589_B3DTV1, 0x19 },
|
|
|
+ { LTC3589_B3DTV2, 0x19 },
|
|
|
+ { LTC3589_L2DTV1, 0x19 },
|
|
|
+ { LTC3589_L2DTV2, 0x19 },
|
|
|
+};
|
|
|
+
|
|
|
+static const struct regmap_config ltc3589_regmap_config = {
|
|
|
+ .reg_bits = 8,
|
|
|
+ .val_bits = 8,
|
|
|
+ .writeable_reg = ltc3589_writeable_reg,
|
|
|
+ .readable_reg = ltc3589_readable_reg,
|
|
|
+ .volatile_reg = ltc3589_volatile_reg,
|
|
|
+ .max_register = LTC3589_L2DTV2,
|
|
|
+ .reg_defaults = ltc3589_reg_defaults,
|
|
|
+ .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults),
|
|
|
+ .use_single_rw = true,
|
|
|
+ .cache_type = REGCACHE_RBTREE,
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+static irqreturn_t ltc3589_isr(int irq, void *dev_id)
|
|
|
+{
|
|
|
+ struct ltc3589 *ltc3589 = dev_id;
|
|
|
+ unsigned int i, irqstat, event;
|
|
|
+
|
|
|
+ regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat);
|
|
|
+
|
|
|
+ if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) {
|
|
|
+ event = REGULATOR_EVENT_OVER_TEMP;
|
|
|
+ for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
|
|
|
+ regulator_notifier_call_chain(ltc3589->regulators[i],
|
|
|
+ event, NULL);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) {
|
|
|
+ event = REGULATOR_EVENT_UNDER_VOLTAGE;
|
|
|
+ for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
|
|
|
+ regulator_notifier_call_chain(ltc3589->regulators[i],
|
|
|
+ event, NULL);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Clear warning condition */
|
|
|
+ regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0);
|
|
|
+
|
|
|
+ return IRQ_HANDLED;
|
|
|
+}
|
|
|
+
|
|
|
+static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2)
|
|
|
+{
|
|
|
+ uint64_t tmp;
|
|
|
+ if (uV == 0)
|
|
|
+ return 0;
|
|
|
+ tmp = (uint64_t)uV * r1;
|
|
|
+ do_div(tmp, r2);
|
|
|
+ return uV + (unsigned int)tmp;
|
|
|
+}
|
|
|
+
|
|
|
+static void ltc3589_apply_fb_voltage_divider(struct ltc3589_regulator *rdesc)
|
|
|
+{
|
|
|
+ struct regulator_desc *desc = &rdesc->desc;
|
|
|
+
|
|
|
+ if (!rdesc->r1 || !rdesc->r2)
|
|
|
+ return;
|
|
|
+
|
|
|
+ desc->min_uV = ltc3589_scale(desc->min_uV, rdesc->r1, rdesc->r2);
|
|
|
+ desc->uV_step = ltc3589_scale(desc->uV_step, rdesc->r1, rdesc->r2);
|
|
|
+ desc->fixed_uV = ltc3589_scale(desc->fixed_uV, rdesc->r1, rdesc->r2);
|
|
|
+}
|
|
|
+
|
|
|
+static int ltc3589_probe(struct i2c_client *client,
|
|
|
+ const struct i2c_device_id *id)
|
|
|
+{
|
|
|
+ struct device *dev = &client->dev;
|
|
|
+ struct ltc3589_regulator *descs;
|
|
|
+ struct ltc3589 *ltc3589;
|
|
|
+ int i, ret;
|
|
|
+
|
|
|
+ ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL);
|
|
|
+ if (!ltc3589)
|
|
|
+ return -ENOMEM;
|
|
|
+
|
|
|
+ i2c_set_clientdata(client, ltc3589);
|
|
|
+ ltc3589->variant = id->driver_data;
|
|
|
+ ltc3589->dev = dev;
|
|
|
+
|
|
|
+ descs = ltc3589->regulator_descs;
|
|
|
+ memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators));
|
|
|
+ if (ltc3589->variant == LTC3589) {
|
|
|
+ descs[LTC3589_LDO3].desc.fixed_uV = 1800000;
|
|
|
+ descs[LTC3589_LDO4].desc.volt_table = ltc3589_ldo4;
|
|
|
+ } else {
|
|
|
+ descs[LTC3589_LDO3].desc.fixed_uV = 2800000;
|
|
|
+ descs[LTC3589_LDO4].desc.volt_table = ltc3589_12_ldo4;
|
|
|
+ }
|
|
|
+
|
|
|
+ ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config);
|
|
|
+ if (IS_ERR(ltc3589->regmap)) {
|
|
|
+ ret = PTR_ERR(ltc3589->regmap);
|
|
|
+ dev_err(dev, "failed to initialize regmap: %d\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = ltc3589_parse_regulators_dt(ltc3589);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ for (i = 0; i < LTC3589_NUM_REGULATORS; i++) {
|
|
|
+ struct ltc3589_regulator *rdesc = <c3589->regulator_descs[i];
|
|
|
+ struct regulator_desc *desc = &rdesc->desc;
|
|
|
+ struct regulator_init_data *init_data;
|
|
|
+ struct regulator_config config = { };
|
|
|
+
|
|
|
+ init_data = match_init_data(i);
|
|
|
+
|
|
|
+ if (i < LTC3589_LDO3)
|
|
|
+ ltc3589_apply_fb_voltage_divider(rdesc);
|
|
|
+
|
|
|
+ config.dev = dev;
|
|
|
+ config.init_data = init_data;
|
|
|
+ config.driver_data = ltc3589;
|
|
|
+ config.of_node = match_of_node(i);
|
|
|
+
|
|
|
+ ltc3589->regulators[i] = devm_regulator_register(dev, desc,
|
|
|
+ &config);
|
|
|
+ if (IS_ERR(ltc3589->regulators[i])) {
|
|
|
+ ret = PTR_ERR(ltc3589->regulators[i]);
|
|
|
+ dev_err(dev, "failed to register regulator %s: %d\n",
|
|
|
+ desc->name, ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = devm_request_threaded_irq(dev, client->irq, NULL, ltc3589_isr,
|
|
|
+ IRQF_TRIGGER_LOW | IRQF_ONESHOT,
|
|
|
+ client->name, ltc3589);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(dev, "Failed to request IRQ: %d\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct i2c_device_id ltc3589_i2c_id[] = {
|
|
|
+ { "ltc3589", LTC3589 },
|
|
|
+ { "ltc3589-1", LTC3589_1 },
|
|
|
+ { "ltc3589-2", LTC3589_2 },
|
|
|
+ { }
|
|
|
+};
|
|
|
+MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id);
|
|
|
+
|
|
|
+static struct i2c_driver ltc3589_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = DRIVER_NAME,
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ },
|
|
|
+ .probe = ltc3589_probe,
|
|
|
+ .id_table = ltc3589_i2c_id,
|
|
|
+};
|
|
|
+module_i2c_driver(ltc3589_driver);
|
|
|
+
|
|
|
+MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
|
|
|
+MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)");
|
|
|
+MODULE_LICENSE("GPL v2");
|
|
|
+MODULE_ALIAS("i2c:ltc3589");
|