|
@@ -364,43 +364,6 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
|
|
DRM_ERROR("FDI link training failed!\n");
|
|
DRM_ERROR("FDI link training failed!\n");
|
|
}
|
|
}
|
|
|
|
|
|
-static void intel_ddi_mode_set(struct intel_encoder *encoder)
|
|
|
|
-{
|
|
|
|
- struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
|
|
|
|
- int port = intel_ddi_get_encoder_port(encoder);
|
|
|
|
- int pipe = crtc->pipe;
|
|
|
|
- int type = encoder->type;
|
|
|
|
- struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
|
|
|
|
-
|
|
|
|
- DRM_DEBUG_KMS("Preparing DDI mode on port %c, pipe %c\n",
|
|
|
|
- port_name(port), pipe_name(pipe));
|
|
|
|
-
|
|
|
|
- if (crtc->config.has_audio) {
|
|
|
|
- DRM_DEBUG_DRIVER("Audio on pipe %c on DDI\n",
|
|
|
|
- pipe_name(crtc->pipe));
|
|
|
|
-
|
|
|
|
- /* write eld */
|
|
|
|
- DRM_DEBUG_DRIVER("DDI audio: write eld information\n");
|
|
|
|
- intel_write_eld(&encoder->base, adjusted_mode);
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
|
|
|
|
- struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
|
|
|
|
- struct intel_digital_port *intel_dig_port =
|
|
|
|
- enc_to_dig_port(&encoder->base);
|
|
|
|
-
|
|
|
|
- intel_dp->DP = intel_dig_port->saved_port_bits |
|
|
|
|
- DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
|
|
|
|
- intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
|
|
|
|
- } else if (type == INTEL_OUTPUT_HDMI) {
|
|
|
|
- struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
|
|
|
|
-
|
|
|
|
- intel_hdmi->set_infoframes(&encoder->base,
|
|
|
|
- crtc->config.has_hdmi_sink,
|
|
|
|
- adjusted_mode);
|
|
|
|
- }
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
static struct intel_encoder *
|
|
static struct intel_encoder *
|
|
intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)
|
|
intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)
|
|
{
|
|
{
|
|
@@ -1279,28 +1242,48 @@ void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc)
|
|
static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
|
|
static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
|
|
{
|
|
{
|
|
struct drm_encoder *encoder = &intel_encoder->base;
|
|
struct drm_encoder *encoder = &intel_encoder->base;
|
|
- struct drm_crtc *crtc = encoder->crtc;
|
|
|
|
struct drm_i915_private *dev_priv = encoder->dev->dev_private;
|
|
struct drm_i915_private *dev_priv = encoder->dev->dev_private;
|
|
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
|
|
|
|
|
+ struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
|
|
enum port port = intel_ddi_get_encoder_port(intel_encoder);
|
|
enum port port = intel_ddi_get_encoder_port(intel_encoder);
|
|
int type = intel_encoder->type;
|
|
int type = intel_encoder->type;
|
|
|
|
|
|
|
|
+ if (crtc->config.has_audio) {
|
|
|
|
+ DRM_DEBUG_DRIVER("Audio on pipe %c on DDI\n",
|
|
|
|
+ pipe_name(crtc->pipe));
|
|
|
|
+
|
|
|
|
+ /* write eld */
|
|
|
|
+ DRM_DEBUG_DRIVER("DDI audio: write eld information\n");
|
|
|
|
+ intel_write_eld(encoder, &crtc->config.adjusted_mode);
|
|
|
|
+ }
|
|
|
|
+
|
|
if (type == INTEL_OUTPUT_EDP) {
|
|
if (type == INTEL_OUTPUT_EDP) {
|
|
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
|
|
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
|
|
intel_edp_panel_on(intel_dp);
|
|
intel_edp_panel_on(intel_dp);
|
|
}
|
|
}
|
|
|
|
|
|
- WARN_ON(intel_crtc->ddi_pll_sel == PORT_CLK_SEL_NONE);
|
|
|
|
- I915_WRITE(PORT_CLK_SEL(port), intel_crtc->ddi_pll_sel);
|
|
|
|
|
|
+ WARN_ON(crtc->ddi_pll_sel == PORT_CLK_SEL_NONE);
|
|
|
|
+ I915_WRITE(PORT_CLK_SEL(port), crtc->ddi_pll_sel);
|
|
|
|
|
|
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
|
|
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
|
|
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
|
|
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
|
|
|
|
+ struct intel_digital_port *intel_dig_port =
|
|
|
|
+ enc_to_dig_port(encoder);
|
|
|
|
+
|
|
|
|
+ intel_dp->DP = intel_dig_port->saved_port_bits |
|
|
|
|
+ DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
|
|
|
|
+ intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
|
|
|
|
|
|
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
|
|
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
|
|
intel_dp_start_link_train(intel_dp);
|
|
intel_dp_start_link_train(intel_dp);
|
|
intel_dp_complete_link_train(intel_dp);
|
|
intel_dp_complete_link_train(intel_dp);
|
|
if (port != PORT_A)
|
|
if (port != PORT_A)
|
|
intel_dp_stop_link_train(intel_dp);
|
|
intel_dp_stop_link_train(intel_dp);
|
|
|
|
+ } else if (type == INTEL_OUTPUT_HDMI) {
|
|
|
|
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
|
|
|
|
+
|
|
|
|
+ intel_hdmi->set_infoframes(encoder,
|
|
|
|
+ crtc->config.has_hdmi_sink,
|
|
|
|
+ &crtc->config.adjusted_mode);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
@@ -1697,7 +1680,6 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
|
|
DRM_MODE_ENCODER_TMDS);
|
|
DRM_MODE_ENCODER_TMDS);
|
|
|
|
|
|
intel_encoder->compute_config = intel_ddi_compute_config;
|
|
intel_encoder->compute_config = intel_ddi_compute_config;
|
|
- intel_encoder->mode_set = intel_ddi_mode_set;
|
|
|
|
intel_encoder->enable = intel_enable_ddi;
|
|
intel_encoder->enable = intel_enable_ddi;
|
|
intel_encoder->pre_enable = intel_ddi_pre_enable;
|
|
intel_encoder->pre_enable = intel_ddi_pre_enable;
|
|
intel_encoder->disable = intel_disable_ddi;
|
|
intel_encoder->disable = intel_disable_ddi;
|