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@@ -4013,6 +4013,15 @@ __i915_request_irq_complete(struct drm_i915_gem_request *req)
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{
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struct intel_engine_cs *engine = req->engine;
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+ /* Note that the engine may have wrapped around the seqno, and
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+ * so our request->global_seqno will be ahead of the hardware,
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+ * even though it completed the request before wrapping. We catch
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+ * this by kicking all the waiters before resetting the seqno
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+ * in hardware, and also signal the fence.
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+ */
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+ if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &req->fence.flags))
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+ return true;
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+
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/* Before we do the heavier coherent read of the seqno,
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* check the value (hopefully) in the CPU cacheline.
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*/
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