|
@@ -1004,7 +1004,7 @@ static inline void ring_tx_db(struct adapter *adapter, struct sge_txq *tq,
|
|
|
? (tq->pidx - 1)
|
|
|
: (tq->size - 1));
|
|
|
__be64 *src = (__be64 *)&tq->desc[index];
|
|
|
- __be64 __iomem *dst = (__be64 *)(tq->bar2_addr +
|
|
|
+ __be64 __iomem *dst = (__be64 __iomem *)(tq->bar2_addr +
|
|
|
SGE_UDB_WCDOORBELL);
|
|
|
unsigned int count = EQ_UNIT / sizeof(__be64);
|
|
|
|
|
@@ -1018,7 +1018,11 @@ static inline void ring_tx_db(struct adapter *adapter, struct sge_txq *tq,
|
|
|
* DMA.
|
|
|
*/
|
|
|
while (count) {
|
|
|
- writeq(*src, dst);
|
|
|
+ /* the (__force u64) is because the compiler
|
|
|
+ * doesn't understand the endian swizzling
|
|
|
+ * going on
|
|
|
+ */
|
|
|
+ writeq((__force u64)*src, dst);
|
|
|
src++;
|
|
|
dst++;
|
|
|
count--;
|
|
@@ -1252,8 +1256,8 @@ int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev)
|
|
|
BUG_ON(DIV_ROUND_UP(ETHTXQ_MAX_HDR, TXD_PER_EQ_UNIT) > 1);
|
|
|
wr = (void *)&txq->q.desc[txq->q.pidx];
|
|
|
wr->equiq_to_len16 = cpu_to_be32(wr_mid);
|
|
|
- wr->r3[0] = cpu_to_be64(0);
|
|
|
- wr->r3[1] = cpu_to_be64(0);
|
|
|
+ wr->r3[0] = cpu_to_be32(0);
|
|
|
+ wr->r3[1] = cpu_to_be32(0);
|
|
|
skb_copy_from_linear_data(skb, (void *)wr->ethmacdst, fw_hdr_copy_len);
|
|
|
end = (u64 *)wr + flits;
|
|
|
|