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@@ -49,6 +49,7 @@
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/* GPIO Registers */
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#define INPUT_VALUE 0x00
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+#define OUTPUT_EN 0x04
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#define IRQ_PENDING 0x0c
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#define OUTPUT_SET 0x14
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#define OUTPUT_CLEAR 0x18
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@@ -431,6 +432,15 @@ static int oxnas_gpio_request_enable(struct pinctrl_dev *pctldev,
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return 0;
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}
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+static int oxnas_gpio_get_direction(struct gpio_chip *chip,
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+ unsigned int offset)
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+{
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+ struct oxnas_gpio_bank *bank = gpiochip_get_data(chip);
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+ u32 mask = BIT(offset);
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+
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+ return !(readl_relaxed(bank->reg_base + OUTPUT_EN) & mask);
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+}
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+
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static int oxnas_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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@@ -664,6 +674,7 @@ static void oxnas_gpio_irq_handler(struct irq_desc *desc)
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.label = "GPIO" #_bank, \
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.request = gpiochip_generic_request, \
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.free = gpiochip_generic_free, \
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+ .get_direction = oxnas_gpio_get_direction, \
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.direction_input = oxnas_gpio_direction_input, \
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.direction_output = oxnas_gpio_direction_output, \
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.get = oxnas_gpio_get, \
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