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@@ -244,10 +244,23 @@ mips_pci_controller:
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MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
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MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
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#endif
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+#ifndef CONFIG_EVA
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/* Fix up target memory mapping. */
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MSC_READ(MSC01_PCI_BAR0, mask);
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MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
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+#else
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+ /*
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+ * Setup the Malta max (2GB) memory for PCI DMA in host bridge
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+ * in transparent addressing mode, starting from 0x80000000.
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+ */
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+ mask = PHYS_OFFSET | (1<<3);
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+ MSC_WRITE(MSC01_PCI_BAR0, mask);
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+ mask = PHYS_OFFSET;
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+ MSC_WRITE(MSC01_PCI_HEAD4, mask);
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+ MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
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+ MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
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+#endif
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/* Don't handle target retries indefinitely. */
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if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
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MSC01_PCI_CFG_MAXRTRY_MSK)
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