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drm/i915: move modeset checks out of save/restore_modeset_reg

That way the control flow is clearer, and it prepares the stage
to extract these ums functions and hide them somewhere.

There's still tons of display stuff outside of these, but that
requires more work.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter 12 年之前
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2e9723a3e7
共有 1 个文件被更改,包括 15 次插入23 次删除
  1. 15 23
      drivers/gpu/drm/i915/i915_suspend.c

+ 15 - 23
drivers/gpu/drm/i915/i915_suspend.c

@@ -240,9 +240,6 @@ static void i915_save_modeset_reg(struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int i;
 	int i;
 
 
-	if (drm_core_check_feature(dev, DRIVER_MODESET))
-		return;
-
 	/* Cursor state */
 	/* Cursor state */
 	dev_priv->regfile.saveCURACNTR = I915_READ(_CURACNTR);
 	dev_priv->regfile.saveCURACNTR = I915_READ(_CURACNTR);
 	dev_priv->regfile.saveCURAPOS = I915_READ(_CURAPOS);
 	dev_priv->regfile.saveCURAPOS = I915_READ(_CURAPOS);
@@ -410,8 +407,17 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
 	int dpll_b_reg, fpb0_reg, fpb1_reg;
 	int dpll_b_reg, fpb0_reg, fpb1_reg;
 	int i;
 	int i;
 
 
-	if (drm_core_check_feature(dev, DRIVER_MODESET))
-		return;
+	/* Display port ratios (must be done before clock is set) */
+	if (SUPPORTS_INTEGRATED_DP(dev)) {
+		I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M);
+		I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M);
+		I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N);
+		I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N);
+		I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M);
+		I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M);
+		I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N);
+		I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N);
+	}
 
 
 	/* Fences */
 	/* Fences */
 	switch (INTEL_INFO(dev)->gen) {
 	switch (INTEL_INFO(dev)->gen) {
@@ -625,7 +631,8 @@ static void i915_save_display(struct drm_device *dev)
 
 
 	/* This is only meaningful in non-KMS mode */
 	/* This is only meaningful in non-KMS mode */
 	/* Don't regfile.save them in KMS mode */
 	/* Don't regfile.save them in KMS mode */
-	i915_save_modeset_reg(dev);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_save_modeset_reg(dev);
 
 
 	/* LVDS state */
 	/* LVDS state */
 	if (HAS_PCH_SPLIT(dev)) {
 	if (HAS_PCH_SPLIT(dev)) {
@@ -711,23 +718,8 @@ static void i915_restore_display(struct drm_device *dev)
 	if (INTEL_INFO(dev)->gen <= 4)
 	if (INTEL_INFO(dev)->gen <= 4)
 		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
 		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
 
 
-	if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-		/* Display port ratios (must be done before clock is set) */
-		if (SUPPORTS_INTEGRATED_DP(dev)) {
-			I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M);
-			I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M);
-			I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N);
-			I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N);
-			I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M);
-			I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M);
-			I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N);
-			I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N);
-		}
-	}
-
-	/* This is only meaningful in non-KMS mode */
-	/* Don't restore them in KMS mode */
-	i915_restore_modeset_reg(dev);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_restore_modeset_reg(dev);
 
 
 	/* LVDS state */
 	/* LVDS state */
 	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev))
 	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev))