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@@ -1,6 +1,6 @@
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/*
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/*
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* Copyright (c) 2009-2011 Wind River Systems, Inc.
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* Copyright (c) 2009-2011 Wind River Systems, Inc.
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- * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini)
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+ * Copyright (c) 2011 ST Microelectronics (Alessandro Rubini, Davide Ciminaghi)
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* it under the terms of the GNU General Public License version 2 as
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@@ -27,21 +27,28 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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-#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/seq_file.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/sta2x11-mfd.h>
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#include <linux/mfd/sta2x11-mfd.h>
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+#include <linux/regmap.h>
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#include <asm/sta2x11.h>
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#include <asm/sta2x11.h>
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+static inline int __reg_within_range(unsigned int r,
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+ unsigned int start,
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+ unsigned int end)
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+{
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+ return ((r >= start) && (r <= end));
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+}
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+
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/* This describes STA2X11 MFD chip for us, we may have several */
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/* This describes STA2X11 MFD chip for us, we may have several */
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struct sta2x11_mfd {
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struct sta2x11_mfd {
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struct sta2x11_instance *instance;
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struct sta2x11_instance *instance;
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- spinlock_t lock;
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+ struct regmap *regmap[sta2x11_n_mfd_plat_devs];
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+ spinlock_t lock[sta2x11_n_mfd_plat_devs];
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struct list_head list;
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struct list_head list;
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- void __iomem *sctl_regs;
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- void __iomem *apbreg_regs;
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+ void __iomem *regs[sta2x11_n_mfd_plat_devs];
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};
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};
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static LIST_HEAD(sta2x11_mfd_list);
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static LIST_HEAD(sta2x11_mfd_list);
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@@ -71,6 +78,7 @@ static struct sta2x11_mfd *sta2x11_mfd_find(struct pci_dev *pdev)
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static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
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static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
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{
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{
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+ int i;
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
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struct sta2x11_instance *instance;
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struct sta2x11_instance *instance;
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@@ -83,7 +91,8 @@ static int sta2x11_mfd_add(struct pci_dev *pdev, gfp_t flags)
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if (!mfd)
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if (!mfd)
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return -ENOMEM;
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return -ENOMEM;
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INIT_LIST_HEAD(&mfd->list);
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INIT_LIST_HEAD(&mfd->list);
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- spin_lock_init(&mfd->lock);
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+ for (i = 0; i < ARRAY_SIZE(mfd->lock); i++)
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+ spin_lock_init(&mfd->lock[i]);
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mfd->instance = instance;
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mfd->instance = instance;
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list_add(&mfd->list, &sta2x11_mfd_list);
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list_add(&mfd->list, &sta2x11_mfd_list);
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return 0;
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return 0;
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@@ -100,161 +109,276 @@ static int mfd_remove(struct pci_dev *pdev)
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return 0;
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return 0;
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}
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}
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-/* These two functions are exported and are not expected to fail */
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-u32 sta2x11_sctl_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
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+/* This function is exported and is not expected to fail */
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+u32 __sta2x11_mfd_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val,
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+ enum sta2x11_mfd_plat_dev index)
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{
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{
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
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struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
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u32 r;
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u32 r;
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unsigned long flags;
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unsigned long flags;
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+ void __iomem *regs;
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if (!mfd) {
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if (!mfd) {
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dev_warn(&pdev->dev, ": can't access sctl regs\n");
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dev_warn(&pdev->dev, ": can't access sctl regs\n");
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return 0;
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return 0;
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}
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}
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- if (!mfd->sctl_regs) {
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+
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+ regs = mfd->regs[index];
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+ if (!regs) {
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dev_warn(&pdev->dev, ": system ctl not initialized\n");
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dev_warn(&pdev->dev, ": system ctl not initialized\n");
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return 0;
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return 0;
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}
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}
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- spin_lock_irqsave(&mfd->lock, flags);
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- r = readl(mfd->sctl_regs + reg);
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+ spin_lock_irqsave(&mfd->lock[index], flags);
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+ r = readl(regs + reg);
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r &= ~mask;
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r &= ~mask;
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r |= val;
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r |= val;
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if (mask)
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if (mask)
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- writel(r, mfd->sctl_regs + reg);
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- spin_unlock_irqrestore(&mfd->lock, flags);
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+ writel(r, regs + reg);
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+ spin_unlock_irqrestore(&mfd->lock[index], flags);
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return r;
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return r;
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}
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}
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-EXPORT_SYMBOL(sta2x11_sctl_mask);
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+EXPORT_SYMBOL(__sta2x11_mfd_mask);
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-u32 sta2x11_apbreg_mask(struct pci_dev *pdev, u32 reg, u32 mask, u32 val)
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+int sta2x11_mfd_get_regs_data(struct platform_device *dev,
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+ enum sta2x11_mfd_plat_dev index,
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+ void __iomem **regs,
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+ spinlock_t **lock)
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{
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{
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- struct sta2x11_mfd *mfd = sta2x11_mfd_find(pdev);
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- u32 r;
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- unsigned long flags;
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+ struct pci_dev *pdev = *(struct pci_dev **)(dev->dev.platform_data);
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+ struct sta2x11_mfd *mfd;
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- if (!mfd) {
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- dev_warn(&pdev->dev, ": can't access apb regs\n");
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- return 0;
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- }
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- if (!mfd->apbreg_regs) {
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- dev_warn(&pdev->dev, ": apb bridge not initialized\n");
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- return 0;
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- }
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- spin_lock_irqsave(&mfd->lock, flags);
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- r = readl(mfd->apbreg_regs + reg);
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- r &= ~mask;
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- r |= val;
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- if (mask)
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- writel(r, mfd->apbreg_regs + reg);
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- spin_unlock_irqrestore(&mfd->lock, flags);
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- return r;
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+ if (!pdev)
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+ return -ENODEV;
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+ mfd = sta2x11_mfd_find(pdev);
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+ if (!mfd)
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+ return -ENODEV;
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+ if (index >= sta2x11_n_mfd_plat_devs)
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+ return -ENODEV;
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+ *regs = mfd->regs[index];
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+ *lock = &mfd->lock[index];
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+ pr_debug("%s %d *regs = %p\n", __func__, __LINE__, *regs);
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+ return *regs ? 0 : -ENODEV;
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}
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}
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-EXPORT_SYMBOL(sta2x11_apbreg_mask);
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-
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-/* Two debugfs files, for our registers (FIXME: one instance only) */
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-#define REG(regname) {.name = #regname, .offset = SCTL_ ## regname}
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-static struct debugfs_reg32 sta2x11_sctl_regs[] = {
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- REG(SCCTL), REG(ARMCFG), REG(SCPLLCTL), REG(SCPLLFCTRL),
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- REG(SCRESFRACT), REG(SCRESCTRL1), REG(SCRESXTRL2), REG(SCPEREN0),
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- REG(SCPEREN1), REG(SCPEREN2), REG(SCGRST), REG(SCPCIPMCR1),
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- REG(SCPCIPMCR2), REG(SCPCIPMSR1), REG(SCPCIPMSR2), REG(SCPCIPMSR3),
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- REG(SCINTREN), REG(SCRISR), REG(SCCLKSTAT0), REG(SCCLKSTAT1),
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- REG(SCCLKSTAT2), REG(SCRSTSTA),
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-};
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-#undef REG
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+EXPORT_SYMBOL(sta2x11_mfd_get_regs_data);
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-static struct debugfs_regset32 sctl_regset = {
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- .regs = sta2x11_sctl_regs,
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- .nregs = ARRAY_SIZE(sta2x11_sctl_regs),
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-};
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+/*
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+ * Special sta2x11-mfd regmap lock/unlock functions
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+ */
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+
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+static void sta2x11_regmap_lock(void *__lock)
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+{
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+ spinlock_t *lock = __lock;
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+ spin_lock(lock);
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+}
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-#define REG(regname) {.name = #regname, .offset = regname}
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-static struct debugfs_reg32 sta2x11_apbreg_regs[] = {
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- REG(APBREG_BSR), REG(APBREG_PAER), REG(APBREG_PWAC), REG(APBREG_PRAC),
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- REG(APBREG_PCG), REG(APBREG_PUR), REG(APBREG_EMU_PCG),
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+static void sta2x11_regmap_unlock(void *__lock)
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+{
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+ spinlock_t *lock = __lock;
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+ spin_unlock(lock);
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+}
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+
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+/* OTP (one time programmable registers do not require locking */
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+static void sta2x11_regmap_nolock(void *__lock)
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+{
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+}
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+
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+static const char *sta2x11_mfd_names[sta2x11_n_mfd_plat_devs] = {
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+ [sta2x11_sctl] = STA2X11_MFD_SCTL_NAME,
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+ [sta2x11_apbreg] = STA2X11_MFD_APBREG_NAME,
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+ [sta2x11_apb_soc_regs] = STA2X11_MFD_APB_SOC_REGS_NAME,
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+ [sta2x11_scr] = STA2X11_MFD_SCR_NAME,
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};
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};
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-#undef REG
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-static struct debugfs_regset32 apbreg_regset = {
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- .regs = sta2x11_apbreg_regs,
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- .nregs = ARRAY_SIZE(sta2x11_apbreg_regs),
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+static bool sta2x11_sctl_writeable_reg(struct device *dev, unsigned int reg)
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+{
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+ return !__reg_within_range(reg, SCTL_SCPCIECSBRST, SCTL_SCRSTSTA);
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+}
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+
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+static struct regmap_config sta2x11_sctl_regmap_config = {
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+ .reg_bits = 32,
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+ .reg_stride = 4,
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+ .val_bits = 32,
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+ .lock = sta2x11_regmap_lock,
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+ .unlock = sta2x11_regmap_unlock,
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+ .max_register = SCTL_SCRSTSTA,
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+ .writeable_reg = sta2x11_sctl_writeable_reg,
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};
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};
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-static struct dentry *sta2x11_sctl_debugfs;
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-static struct dentry *sta2x11_apbreg_debugfs;
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+static bool sta2x11_scr_readable_reg(struct device *dev, unsigned int reg)
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+{
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+ return (reg == STA2X11_SECR_CR) ||
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+ __reg_within_range(reg, STA2X11_SECR_FVR0, STA2X11_SECR_FVR1);
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+}
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-/* Probe for the two platform devices */
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-static int sta2x11_sctl_probe(struct platform_device *dev)
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+static bool sta2x11_scr_writeable_reg(struct device *dev, unsigned int reg)
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{
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{
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- struct pci_dev **pdev;
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- struct sta2x11_mfd *mfd;
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- struct resource *res;
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+ return false;
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+}
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- pdev = dev->dev.platform_data;
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- mfd = sta2x11_mfd_find(*pdev);
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- if (!mfd)
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- return -ENODEV;
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+static struct regmap_config sta2x11_scr_regmap_config = {
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+ .reg_bits = 32,
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+ .reg_stride = 4,
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+ .val_bits = 32,
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+ .lock = sta2x11_regmap_nolock,
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+ .unlock = sta2x11_regmap_nolock,
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+ .max_register = STA2X11_SECR_FVR1,
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+ .readable_reg = sta2x11_scr_readable_reg,
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+ .writeable_reg = sta2x11_scr_writeable_reg,
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+};
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- res = platform_get_resource(dev, IORESOURCE_MEM, 0);
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- if (!res)
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- return -ENOMEM;
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+static bool sta2x11_apbreg_readable_reg(struct device *dev, unsigned int reg)
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+{
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+ /* Two blocks (CAN and MLB, SARAC) 0x100 bytes apart */
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+ if (reg >= APBREG_BSR_SARAC)
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+ reg -= APBREG_BSR_SARAC;
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+ switch (reg) {
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+ case APBREG_BSR:
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+ case APBREG_PAER:
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+ case APBREG_PWAC:
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+ case APBREG_PRAC:
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+ case APBREG_PCG:
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+ case APBREG_PUR:
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+ case APBREG_EMU_PCG:
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+ return true;
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+ default:
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+ return false;
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+ }
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+}
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- if (!request_mem_region(res->start, resource_size(res),
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- "sta2x11-sctl"))
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- return -EBUSY;
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+static bool sta2x11_apbreg_writeable_reg(struct device *dev, unsigned int reg)
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+{
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+ if (reg >= APBREG_BSR_SARAC)
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+ reg -= APBREG_BSR_SARAC;
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+ if (!sta2x11_apbreg_readable_reg(dev, reg))
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+ return false;
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+ return reg != APBREG_PAER;
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+}
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- mfd->sctl_regs = ioremap(res->start, resource_size(res));
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- if (!mfd->sctl_regs) {
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- release_mem_region(res->start, resource_size(res));
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- return -ENOMEM;
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+static struct regmap_config sta2x11_apbreg_regmap_config = {
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+ .reg_bits = 32,
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+ .reg_stride = 4,
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+ .val_bits = 32,
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+ .lock = sta2x11_regmap_lock,
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+ .unlock = sta2x11_regmap_unlock,
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+ .max_register = APBREG_EMU_PCG_SARAC,
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+ .readable_reg = sta2x11_apbreg_readable_reg,
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+ .writeable_reg = sta2x11_apbreg_writeable_reg,
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+};
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+
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+static bool sta2x11_apb_soc_regs_readable_reg(struct device *dev,
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+ unsigned int reg)
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+{
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+ return reg <= PCIE_SoC_INT_ROUTER_STATUS3_REG ||
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+ __reg_within_range(reg, DMA_IP_CTRL_REG, SPARE3_RESERVED) ||
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+ __reg_within_range(reg, MASTER_LOCK_REG,
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+ SYSTEM_CONFIG_STATUS_REG) ||
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+ reg == MSP_CLK_CTRL_REG ||
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+ __reg_within_range(reg, COMPENSATION_REG1, TEST_CTL_REG);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static bool sta2x11_apb_soc_regs_writeable_reg(struct device *dev,
|
|
|
|
+ unsigned int reg)
|
|
|
|
+{
|
|
|
|
+ if (!sta2x11_apb_soc_regs_readable_reg(dev, reg))
|
|
|
|
+ return false;
|
|
|
|
+ switch (reg) {
|
|
|
|
+ case PCIE_COMMON_CLOCK_CONFIG_0_4_0:
|
|
|
|
+ case SYSTEM_CONFIG_STATUS_REG:
|
|
|
|
+ case COMPENSATION_REG1:
|
|
|
|
+ case PCIE_SoC_INT_ROUTER_STATUS0_REG...PCIE_SoC_INT_ROUTER_STATUS3_REG:
|
|
|
|
+ case PCIE_PM_STATUS_0_PORT_0_4...PCIE_PM_STATUS_7_0_EP4:
|
|
|
|
+ return false;
|
|
|
|
+ default:
|
|
|
|
+ return true;
|
|
}
|
|
}
|
|
- sctl_regset.base = mfd->sctl_regs;
|
|
|
|
- sta2x11_sctl_debugfs = debugfs_create_regset32("sta2x11-sctl",
|
|
|
|
- S_IFREG | S_IRUGO,
|
|
|
|
- NULL, &sctl_regset);
|
|
|
|
- return 0;
|
|
|
|
}
|
|
}
|
|
|
|
|
|
-static int sta2x11_apbreg_probe(struct platform_device *dev)
|
|
|
|
|
|
+static struct regmap_config sta2x11_apb_soc_regs_regmap_config = {
|
|
|
|
+ .reg_bits = 32,
|
|
|
|
+ .reg_stride = 4,
|
|
|
|
+ .val_bits = 32,
|
|
|
|
+ .lock = sta2x11_regmap_lock,
|
|
|
|
+ .unlock = sta2x11_regmap_unlock,
|
|
|
|
+ .max_register = TEST_CTL_REG,
|
|
|
|
+ .readable_reg = sta2x11_apb_soc_regs_readable_reg,
|
|
|
|
+ .writeable_reg = sta2x11_apb_soc_regs_writeable_reg,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct regmap_config *
|
|
|
|
+sta2x11_mfd_regmap_configs[sta2x11_n_mfd_plat_devs] = {
|
|
|
|
+ [sta2x11_sctl] = &sta2x11_sctl_regmap_config,
|
|
|
|
+ [sta2x11_apbreg] = &sta2x11_apbreg_regmap_config,
|
|
|
|
+ [sta2x11_apb_soc_regs] = &sta2x11_apb_soc_regs_regmap_config,
|
|
|
|
+ [sta2x11_scr] = &sta2x11_scr_regmap_config,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+/* Probe for the four platform devices */
|
|
|
|
+
|
|
|
|
+static int sta2x11_mfd_platform_probe(struct platform_device *dev,
|
|
|
|
+ enum sta2x11_mfd_plat_dev index)
|
|
{
|
|
{
|
|
struct pci_dev **pdev;
|
|
struct pci_dev **pdev;
|
|
struct sta2x11_mfd *mfd;
|
|
struct sta2x11_mfd *mfd;
|
|
struct resource *res;
|
|
struct resource *res;
|
|
|
|
+ const char *name = sta2x11_mfd_names[index];
|
|
|
|
+ struct regmap_config *regmap_config = sta2x11_mfd_regmap_configs[index];
|
|
|
|
|
|
pdev = dev->dev.platform_data;
|
|
pdev = dev->dev.platform_data;
|
|
- dev_dbg(&dev->dev, "%s: pdata is %p\n", __func__, pdev);
|
|
|
|
- dev_dbg(&dev->dev, "%s: *pdata is %p\n", __func__, *pdev);
|
|
|
|
-
|
|
|
|
mfd = sta2x11_mfd_find(*pdev);
|
|
mfd = sta2x11_mfd_find(*pdev);
|
|
if (!mfd)
|
|
if (!mfd)
|
|
return -ENODEV;
|
|
return -ENODEV;
|
|
|
|
+ if (!regmap_config)
|
|
|
|
+ return -ENODEV;
|
|
|
|
|
|
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
if (!res)
|
|
return -ENOMEM;
|
|
return -ENOMEM;
|
|
|
|
|
|
- if (!request_mem_region(res->start, resource_size(res),
|
|
|
|
- "sta2x11-apbreg"))
|
|
|
|
|
|
+ if (!request_mem_region(res->start, resource_size(res), name))
|
|
return -EBUSY;
|
|
return -EBUSY;
|
|
|
|
|
|
- mfd->apbreg_regs = ioremap(res->start, resource_size(res));
|
|
|
|
- if (!mfd->apbreg_regs) {
|
|
|
|
|
|
+ mfd->regs[index] = ioremap(res->start, resource_size(res));
|
|
|
|
+ if (!mfd->regs[index]) {
|
|
release_mem_region(res->start, resource_size(res));
|
|
release_mem_region(res->start, resource_size(res));
|
|
return -ENOMEM;
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
- dev_dbg(&dev->dev, "%s: regbase %p\n", __func__, mfd->apbreg_regs);
|
|
|
|
|
|
+ regmap_config->lock_arg = &mfd->lock;
|
|
|
|
+ /*
|
|
|
|
+ No caching, registers could be reached both via regmap and via
|
|
|
|
+ void __iomem *
|
|
|
|
+ */
|
|
|
|
+ regmap_config->cache_type = REGCACHE_NONE;
|
|
|
|
+ mfd->regmap[index] = devm_regmap_init_mmio(&dev->dev, mfd->regs[index],
|
|
|
|
+ regmap_config);
|
|
|
|
+ WARN_ON(!mfd->regmap[index]);
|
|
|
|
|
|
- apbreg_regset.base = mfd->apbreg_regs;
|
|
|
|
- sta2x11_apbreg_debugfs = debugfs_create_regset32("sta2x11-apbreg",
|
|
|
|
- S_IFREG | S_IRUGO,
|
|
|
|
- NULL, &apbreg_regset);
|
|
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
-/* The two platform drivers */
|
|
|
|
|
|
+static int sta2x11_sctl_probe(struct platform_device *dev)
|
|
|
|
+{
|
|
|
|
+ return sta2x11_mfd_platform_probe(dev, sta2x11_sctl);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sta2x11_apbreg_probe(struct platform_device *dev)
|
|
|
|
+{
|
|
|
|
+ return sta2x11_mfd_platform_probe(dev, sta2x11_apbreg);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sta2x11_apb_soc_regs_probe(struct platform_device *dev)
|
|
|
|
+{
|
|
|
|
+ return sta2x11_mfd_platform_probe(dev, sta2x11_apb_soc_regs);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sta2x11_scr_probe(struct platform_device *dev)
|
|
|
|
+{
|
|
|
|
+ return sta2x11_mfd_platform_probe(dev, sta2x11_scr);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+/* The three platform drivers */
|
|
static struct platform_driver sta2x11_sctl_platform_driver = {
|
|
static struct platform_driver sta2x11_sctl_platform_driver = {
|
|
.driver = {
|
|
.driver = {
|
|
- .name = "sta2x11-sctl",
|
|
|
|
|
|
+ .name = STA2X11_MFD_SCTL_NAME,
|
|
.owner = THIS_MODULE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
},
|
|
.probe = sta2x11_sctl_probe,
|
|
.probe = sta2x11_sctl_probe,
|
|
@@ -268,7 +392,7 @@ static int __init sta2x11_sctl_init(void)
|
|
|
|
|
|
static struct platform_driver sta2x11_platform_driver = {
|
|
static struct platform_driver sta2x11_platform_driver = {
|
|
.driver = {
|
|
.driver = {
|
|
- .name = "sta2x11-apbreg",
|
|
|
|
|
|
+ .name = STA2X11_MFD_APBREG_NAME,
|
|
.owner = THIS_MODULE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
},
|
|
.probe = sta2x11_apbreg_probe,
|
|
.probe = sta2x11_apbreg_probe,
|
|
@@ -280,13 +404,44 @@ static int __init sta2x11_apbreg_init(void)
|
|
return platform_driver_register(&sta2x11_platform_driver);
|
|
return platform_driver_register(&sta2x11_platform_driver);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+static struct platform_driver sta2x11_apb_soc_regs_platform_driver = {
|
|
|
|
+ .driver = {
|
|
|
|
+ .name = STA2X11_MFD_APB_SOC_REGS_NAME,
|
|
|
|
+ .owner = THIS_MODULE,
|
|
|
|
+ },
|
|
|
|
+ .probe = sta2x11_apb_soc_regs_probe,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static int __init sta2x11_apb_soc_regs_init(void)
|
|
|
|
+{
|
|
|
|
+ pr_info("%s\n", __func__);
|
|
|
|
+ return platform_driver_register(&sta2x11_apb_soc_regs_platform_driver);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct platform_driver sta2x11_scr_platform_driver = {
|
|
|
|
+ .driver = {
|
|
|
|
+ .name = STA2X11_MFD_SCR_NAME,
|
|
|
|
+ .owner = THIS_MODULE,
|
|
|
|
+ },
|
|
|
|
+ .probe = sta2x11_scr_probe,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static int __init sta2x11_scr_init(void)
|
|
|
|
+{
|
|
|
|
+ pr_info("%s\n", __func__);
|
|
|
|
+ return platform_driver_register(&sta2x11_scr_platform_driver);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+
|
|
/*
|
|
/*
|
|
- * What follows is the PCI device that hosts the above two pdevs.
|
|
|
|
|
|
+ * What follows are the PCI devices that host the above pdevs.
|
|
* Each logic block is 4kB and they are all consecutive: we use this info.
|
|
* Each logic block is 4kB and they are all consecutive: we use this info.
|
|
*/
|
|
*/
|
|
|
|
|
|
-/* Bar 0 */
|
|
|
|
-enum bar0_cells {
|
|
|
|
|
|
+/* Mfd 0 device */
|
|
|
|
+
|
|
|
|
+/* Mfd 0, Bar 0 */
|
|
|
|
+enum mfd0_bar0_cells {
|
|
STA2X11_GPIO_0 = 0,
|
|
STA2X11_GPIO_0 = 0,
|
|
STA2X11_GPIO_1,
|
|
STA2X11_GPIO_1,
|
|
STA2X11_GPIO_2,
|
|
STA2X11_GPIO_2,
|
|
@@ -295,8 +450,8 @@ enum bar0_cells {
|
|
STA2X11_SCR,
|
|
STA2X11_SCR,
|
|
STA2X11_TIME,
|
|
STA2X11_TIME,
|
|
};
|
|
};
|
|
-/* Bar 1 */
|
|
|
|
-enum bar1_cells {
|
|
|
|
|
|
+/* Mfd 0 , Bar 1 */
|
|
|
|
+enum mfd0_bar1_cells {
|
|
STA2X11_APBREG = 0,
|
|
STA2X11_APBREG = 0,
|
|
};
|
|
};
|
|
#define CELL_4K(_name, _cell) { \
|
|
#define CELL_4K(_name, _cell) { \
|
|
@@ -307,40 +462,71 @@ enum bar1_cells {
|
|
|
|
|
|
static const struct resource gpio_resources[] = {
|
|
static const struct resource gpio_resources[] = {
|
|
{
|
|
{
|
|
- .name = "sta2x11_gpio", /* 4 consecutive cells, 1 driver */
|
|
|
|
|
|
+ /* 4 consecutive cells, 1 driver */
|
|
|
|
+ .name = STA2X11_MFD_GPIO_NAME,
|
|
.start = 0,
|
|
.start = 0,
|
|
.end = (4 * 4096) - 1,
|
|
.end = (4 * 4096) - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
.flags = IORESOURCE_MEM,
|
|
}
|
|
}
|
|
};
|
|
};
|
|
static const struct resource sctl_resources[] = {
|
|
static const struct resource sctl_resources[] = {
|
|
- CELL_4K("sta2x11-sctl", STA2X11_SCTL),
|
|
|
|
|
|
+ CELL_4K(STA2X11_MFD_SCTL_NAME, STA2X11_SCTL),
|
|
};
|
|
};
|
|
static const struct resource scr_resources[] = {
|
|
static const struct resource scr_resources[] = {
|
|
- CELL_4K("sta2x11-scr", STA2X11_SCR),
|
|
|
|
|
|
+ CELL_4K(STA2X11_MFD_SCR_NAME, STA2X11_SCR),
|
|
};
|
|
};
|
|
static const struct resource time_resources[] = {
|
|
static const struct resource time_resources[] = {
|
|
- CELL_4K("sta2x11-time", STA2X11_TIME),
|
|
|
|
|
|
+ CELL_4K(STA2X11_MFD_TIME_NAME, STA2X11_TIME),
|
|
};
|
|
};
|
|
|
|
|
|
static const struct resource apbreg_resources[] = {
|
|
static const struct resource apbreg_resources[] = {
|
|
- CELL_4K("sta2x11-apbreg", STA2X11_APBREG),
|
|
|
|
|
|
+ CELL_4K(STA2X11_MFD_APBREG_NAME, STA2X11_APBREG),
|
|
};
|
|
};
|
|
|
|
|
|
#define DEV(_name, _r) \
|
|
#define DEV(_name, _r) \
|
|
{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
|
|
{ .name = _name, .num_resources = ARRAY_SIZE(_r), .resources = _r, }
|
|
|
|
|
|
-static struct mfd_cell sta2x11_mfd_bar0[] = {
|
|
|
|
- DEV("sta2x11-gpio", gpio_resources), /* offset 0: we add pdata later */
|
|
|
|
- DEV("sta2x11-sctl", sctl_resources),
|
|
|
|
- DEV("sta2x11-scr", scr_resources),
|
|
|
|
- DEV("sta2x11-time", time_resources),
|
|
|
|
|
|
+static struct mfd_cell sta2x11_mfd0_bar0[] = {
|
|
|
|
+ /* offset 0: we add pdata later */
|
|
|
|
+ DEV(STA2X11_MFD_GPIO_NAME, gpio_resources),
|
|
|
|
+ DEV(STA2X11_MFD_SCTL_NAME, sctl_resources),
|
|
|
|
+ DEV(STA2X11_MFD_SCR_NAME, scr_resources),
|
|
|
|
+ DEV(STA2X11_MFD_TIME_NAME, time_resources),
|
|
};
|
|
};
|
|
|
|
|
|
-static struct mfd_cell sta2x11_mfd_bar1[] = {
|
|
|
|
- DEV("sta2x11-apbreg", apbreg_resources),
|
|
|
|
|
|
+static struct mfd_cell sta2x11_mfd0_bar1[] = {
|
|
|
|
+ DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources),
|
|
};
|
|
};
|
|
|
|
|
|
|
|
+/* Mfd 1 devices */
|
|
|
|
+
|
|
|
|
+/* Mfd 1, Bar 0 */
|
|
|
|
+enum mfd1_bar0_cells {
|
|
|
|
+ STA2X11_VIC = 0,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+/* Mfd 1, Bar 1 */
|
|
|
|
+enum mfd1_bar1_cells {
|
|
|
|
+ STA2X11_APB_SOC_REGS = 0,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const __devinitconst struct resource vic_resources[] = {
|
|
|
|
+ CELL_4K(STA2X11_MFD_VIC_NAME, STA2X11_VIC),
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static const __devinitconst struct resource apb_soc_regs_resources[] = {
|
|
|
|
+ CELL_4K(STA2X11_MFD_APB_SOC_REGS_NAME, STA2X11_APB_SOC_REGS),
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static __devinitdata struct mfd_cell sta2x11_mfd1_bar0[] = {
|
|
|
|
+ DEV(STA2X11_MFD_VIC_NAME, vic_resources),
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static __devinitdata struct mfd_cell sta2x11_mfd1_bar1[] = {
|
|
|
|
+ DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources),
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+
|
|
static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
static int sta2x11_mfd_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
{
|
|
{
|
|
pci_save_state(pdev);
|
|
pci_save_state(pdev);
|
|
@@ -363,11 +549,63 @@ static int sta2x11_mfd_resume(struct pci_dev *pdev)
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+struct sta2x11_mfd_bar_setup_data {
|
|
|
|
+ struct mfd_cell *cells;
|
|
|
|
+ int ncells;
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+struct sta2x11_mfd_setup_data {
|
|
|
|
+ struct sta2x11_mfd_bar_setup_data bars[2];
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#define STA2X11_MFD0 0
|
|
|
|
+#define STA2X11_MFD1 1
|
|
|
|
+
|
|
|
|
+static struct sta2x11_mfd_setup_data mfd_setup_data[] = {
|
|
|
|
+ /* Mfd 0: gpio, sctl, scr, timers / apbregs */
|
|
|
|
+ [STA2X11_MFD0] = {
|
|
|
|
+ .bars = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .cells = sta2x11_mfd0_bar0,
|
|
|
|
+ .ncells = ARRAY_SIZE(sta2x11_mfd0_bar0),
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .cells = sta2x11_mfd0_bar1,
|
|
|
|
+ .ncells = ARRAY_SIZE(sta2x11_mfd0_bar1),
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ /* Mfd 1: vic / apb-soc-regs */
|
|
|
|
+ [STA2X11_MFD1] = {
|
|
|
|
+ .bars = {
|
|
|
|
+ [0] = {
|
|
|
|
+ .cells = sta2x11_mfd1_bar0,
|
|
|
|
+ .ncells = ARRAY_SIZE(sta2x11_mfd1_bar0),
|
|
|
|
+ },
|
|
|
|
+ [1] = {
|
|
|
|
+ .cells = sta2x11_mfd1_bar1,
|
|
|
|
+ .ncells = ARRAY_SIZE(sta2x11_mfd1_bar1),
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static void sta2x11_mfd_setup(struct pci_dev *pdev,
|
|
|
|
+ struct sta2x11_mfd_setup_data *sd)
|
|
|
|
+{
|
|
|
|
+ int i, j;
|
|
|
|
+ for (i = 0; i < ARRAY_SIZE(sd->bars); i++)
|
|
|
|
+ for (j = 0; j < sd->bars[i].ncells; j++) {
|
|
|
|
+ sd->bars[i].cells[j].pdata_size = sizeof(pdev);
|
|
|
|
+ sd->bars[i].cells[j].platform_data = &pdev;
|
|
|
|
+ }
|
|
|
|
+}
|
|
|
|
+
|
|
static int sta2x11_mfd_probe(struct pci_dev *pdev,
|
|
static int sta2x11_mfd_probe(struct pci_dev *pdev,
|
|
- const struct pci_device_id *pci_id)
|
|
|
|
|
|
+ const struct pci_device_id *pci_id)
|
|
{
|
|
{
|
|
int err, i;
|
|
int err, i;
|
|
- struct sta2x11_gpio_pdata *gpio_data;
|
|
|
|
|
|
+ struct sta2x11_mfd_setup_data *setup_data;
|
|
|
|
|
|
dev_info(&pdev->dev, "%s\n", __func__);
|
|
dev_info(&pdev->dev, "%s\n", __func__);
|
|
|
|
|
|
@@ -381,46 +619,29 @@ static int sta2x11_mfd_probe(struct pci_dev *pdev,
|
|
if (err)
|
|
if (err)
|
|
dev_info(&pdev->dev, "Enable msi failed\n");
|
|
dev_info(&pdev->dev, "Enable msi failed\n");
|
|
|
|
|
|
- /* Read gpio config data as pci device's platform data */
|
|
|
|
- gpio_data = dev_get_platdata(&pdev->dev);
|
|
|
|
- if (!gpio_data)
|
|
|
|
- dev_warn(&pdev->dev, "no gpio configuration\n");
|
|
|
|
-
|
|
|
|
- dev_dbg(&pdev->dev, "%s, gpio_data = %p (%p)\n", __func__,
|
|
|
|
- gpio_data, &gpio_data);
|
|
|
|
- dev_dbg(&pdev->dev, "%s, pdev = %p (%p)\n", __func__,
|
|
|
|
- pdev, &pdev);
|
|
|
|
|
|
+ setup_data = pci_id->device == PCI_DEVICE_ID_STMICRO_GPIO ?
|
|
|
|
+ &mfd_setup_data[STA2X11_MFD0] :
|
|
|
|
+ &mfd_setup_data[STA2X11_MFD1];
|
|
|
|
|
|
/* platform data is the pci device for all of them */
|
|
/* platform data is the pci device for all of them */
|
|
- for (i = 0; i < ARRAY_SIZE(sta2x11_mfd_bar0); i++) {
|
|
|
|
- sta2x11_mfd_bar0[i].pdata_size = sizeof(pdev);
|
|
|
|
- sta2x11_mfd_bar0[i].platform_data = &pdev;
|
|
|
|
- }
|
|
|
|
- sta2x11_mfd_bar1[0].pdata_size = sizeof(pdev);
|
|
|
|
- sta2x11_mfd_bar1[0].platform_data = &pdev;
|
|
|
|
|
|
+ sta2x11_mfd_setup(pdev, setup_data);
|
|
|
|
|
|
/* Record this pdev before mfd_add_devices: their probe looks for it */
|
|
/* Record this pdev before mfd_add_devices: their probe looks for it */
|
|
- sta2x11_mfd_add(pdev, GFP_ATOMIC);
|
|
|
|
-
|
|
|
|
-
|
|
|
|
- err = mfd_add_devices(&pdev->dev, -1,
|
|
|
|
- sta2x11_mfd_bar0,
|
|
|
|
- ARRAY_SIZE(sta2x11_mfd_bar0),
|
|
|
|
- &pdev->resource[0],
|
|
|
|
- 0, NULL);
|
|
|
|
- if (err) {
|
|
|
|
- dev_err(&pdev->dev, "mfd_add_devices[0] failed: %d\n", err);
|
|
|
|
- goto err_disable;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- err = mfd_add_devices(&pdev->dev, -1,
|
|
|
|
- sta2x11_mfd_bar1,
|
|
|
|
- ARRAY_SIZE(sta2x11_mfd_bar1),
|
|
|
|
- &pdev->resource[1],
|
|
|
|
- 0, NULL);
|
|
|
|
- if (err) {
|
|
|
|
- dev_err(&pdev->dev, "mfd_add_devices[1] failed: %d\n", err);
|
|
|
|
- goto err_disable;
|
|
|
|
|
|
+ if (!sta2x11_mfd_find(pdev))
|
|
|
|
+ sta2x11_mfd_add(pdev, GFP_ATOMIC);
|
|
|
|
+
|
|
|
|
+ /* Just 2 bars for all mfd's at present */
|
|
|
|
+ for (i = 0; i < 2; i++) {
|
|
|
|
+ err = mfd_add_devices(&pdev->dev, -1,
|
|
|
|
+ setup_data->bars[i].cells,
|
|
|
|
+ setup_data->bars[i].ncells,
|
|
|
|
+ &pdev->resource[i],
|
|
|
|
+ 0, NULL);
|
|
|
|
+ if (err) {
|
|
|
|
+ dev_err(&pdev->dev,
|
|
|
|
+ "mfd_add_devices[%d] failed: %d\n", i, err);
|
|
|
|
+ goto err_disable;
|
|
|
|
+ }
|
|
}
|
|
}
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
@@ -434,6 +655,7 @@ err_disable:
|
|
|
|
|
|
static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
|
|
static DEFINE_PCI_DEVICE_TABLE(sta2x11_mfd_tbl) = {
|
|
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
|
|
{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_GPIO)},
|
|
|
|
+ {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIC)},
|
|
{0,},
|
|
{0,},
|
|
};
|
|
};
|
|
|
|
|
|
@@ -459,6 +681,8 @@ static int __init sta2x11_mfd_init(void)
|
|
*/
|
|
*/
|
|
subsys_initcall(sta2x11_apbreg_init);
|
|
subsys_initcall(sta2x11_apbreg_init);
|
|
subsys_initcall(sta2x11_sctl_init);
|
|
subsys_initcall(sta2x11_sctl_init);
|
|
|
|
+subsys_initcall(sta2x11_apb_soc_regs_init);
|
|
|
|
+subsys_initcall(sta2x11_scr_init);
|
|
rootfs_initcall(sta2x11_mfd_init);
|
|
rootfs_initcall(sta2x11_mfd_init);
|
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_LICENSE("GPL v2");
|