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@@ -201,6 +201,41 @@
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label = "versatile:7";
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default-state = "off";
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};
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+ oscclk0: osc0@0c {
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+ compatible = "arm,syscon-icst307";
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+ #clock-cells = <0>;
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+ lock-offset = <0x20>;
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+ vco-offset = <0x0C>;
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+ clocks = <&xtal24mhz>;
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+ };
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+ oscclk1: osc1@10 {
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+ compatible = "arm,syscon-icst307";
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+ #clock-cells = <0>;
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+ lock-offset = <0x20>;
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+ vco-offset = <0x10>;
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+ clocks = <&xtal24mhz>;
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+ };
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+ oscclk2: osc2@14 {
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+ compatible = "arm,syscon-icst307";
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+ #clock-cells = <0>;
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+ lock-offset = <0x20>;
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+ vco-offset = <0x14>;
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+ clocks = <&xtal24mhz>;
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+ };
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+ oscclk3: osc3@18 {
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+ compatible = "arm,syscon-icst307";
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+ #clock-cells = <0>;
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+ lock-offset = <0x20>;
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+ vco-offset = <0x18>;
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+ clocks = <&xtal24mhz>;
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+ };
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+ oscclk4: osc4@1c {
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+ compatible = "arm,syscon-icst307";
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+ #clock-cells = <0>;
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+ lock-offset = <0x20>;
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+ vco-offset = <0x1c>;
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+ clocks = <&xtal24mhz>;
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+ };
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};
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/* Primary DevChip GIC synthesized with the CPU */
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