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@@ -56,8 +56,8 @@
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#define MTL_RX_ALGORITHM_WSP 0x5
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#define MTL_RX_ALGORITHM_WSP 0x5
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/* RX/TX Queue Mode */
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/* RX/TX Queue Mode */
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-#define MTL_QUEUE_DCB 0x0
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-#define MTL_QUEUE_AVB 0x1
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+#define MTL_QUEUE_AVB 0x0
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+#define MTL_QUEUE_DCB 0x1
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/* The MDC clock could be set higher than the IEEE 802.3
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/* The MDC clock could be set higher than the IEEE 802.3
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* specified frequency limit 0f 2.5 MHz, by programming a clock divider
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* specified frequency limit 0f 2.5 MHz, by programming a clock divider
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