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@@ -99,6 +99,50 @@ static void sd_print_debug_regs(struct realtek_pci_sdmmc *host)
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#define sd_print_debug_regs(host)
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#endif /* DEBUG */
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+static void sd_cmd_set_sd_cmd(struct rtsx_pcr *pcr, struct mmc_command *cmd)
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+{
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+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF,
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+ SD_CMD_START | cmd->opcode);
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+ rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg);
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+}
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+
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+static void sd_cmd_set_data_len(struct rtsx_pcr *pcr, u16 blocks, u16 blksz)
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+{
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+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks);
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+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8);
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+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz);
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+ rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8);
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+}
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+
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+static int sd_response_type(struct mmc_command *cmd)
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+{
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+ switch (mmc_resp_type(cmd)) {
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+ case MMC_RSP_NONE:
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+ return SD_RSP_TYPE_R0;
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+ case MMC_RSP_R1:
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+ return SD_RSP_TYPE_R1;
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+ case MMC_RSP_R1 & ~MMC_RSP_CRC:
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+ return SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
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+ case MMC_RSP_R1B:
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+ return SD_RSP_TYPE_R1b;
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+ case MMC_RSP_R2:
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+ return SD_RSP_TYPE_R2;
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+ case MMC_RSP_R3:
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+ return SD_RSP_TYPE_R3;
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+ default:
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+ return -EINVAL;
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+ }
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+}
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+
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+static int sd_status_index(int resp_type)
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+{
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+ if (resp_type == SD_RSP_TYPE_R0)
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+ return 0;
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+ else if (resp_type == SD_RSP_TYPE_R2)
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+ return 16;
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+
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+ return 5;
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+}
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/*
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* sd_pre_dma_transfer - do dma_map_sg() or using cookie
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*
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@@ -297,47 +341,18 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
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int timeout = 100;
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int i;
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u8 *ptr;
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- int stat_idx = 0;
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- u8 rsp_type;
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- int rsp_len = 5;
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+ int rsp_type;
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+ int stat_idx;
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bool clock_toggled = false;
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dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
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__func__, cmd_idx, arg);
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- /* Response type:
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- * R0
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- * R1, R5, R6, R7
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- * R1b
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- * R2
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- * R3, R4
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- */
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- switch (mmc_resp_type(cmd)) {
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- case MMC_RSP_NONE:
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- rsp_type = SD_RSP_TYPE_R0;
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- rsp_len = 0;
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- break;
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- case MMC_RSP_R1:
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- rsp_type = SD_RSP_TYPE_R1;
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- break;
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- case MMC_RSP_R1 & ~MMC_RSP_CRC:
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- rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
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- break;
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- case MMC_RSP_R1B:
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- rsp_type = SD_RSP_TYPE_R1b;
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- break;
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- case MMC_RSP_R2:
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- rsp_type = SD_RSP_TYPE_R2;
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- rsp_len = 16;
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- break;
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- case MMC_RSP_R3:
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- rsp_type = SD_RSP_TYPE_R3;
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- break;
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- default:
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- dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
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- err = -EINVAL;
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+ rsp_type = sd_response_type(cmd);
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+ if (rsp_type < 0)
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goto out;
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- }
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+
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+ stat_idx = sd_status_index(rsp_type);
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if (rsp_type == SD_RSP_TYPE_R1b)
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timeout = 3000;
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@@ -352,13 +367,7 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
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}
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rtsx_pci_init_cmd(pcr);
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-
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- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
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- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
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- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
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- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
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- rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
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-
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+ sd_cmd_set_sd_cmd(pcr, cmd);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
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0x01, PINGPONG_BUFFER);
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@@ -372,12 +381,10 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host,
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/* Read data from ping-pong buffer */
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for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);
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- stat_idx = 16;
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} else if (rsp_type != SD_RSP_TYPE_R0) {
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/* Read data from SD_CMDx registers */
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for (i = SD_CMD0; i <= SD_CMD4; i++)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0);
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- stat_idx = 5;
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}
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0);
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