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@@ -64,6 +64,10 @@ struct pt_regs_offset {
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{.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
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#define REG_OFFSET_END {.name = NULL, .offset = 0}
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+#define TVSO(f) (offsetof(struct thread_vr_state, f))
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+#define TFSO(f) (offsetof(struct thread_fp_state, f))
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+#define TSO(f) (offsetof(struct thread_struct, f))
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+
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static const struct pt_regs_offset regoffset_table[] = {
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GPR_OFFSET_NAME(0),
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GPR_OFFSET_NAME(1),
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@@ -181,6 +185,26 @@ static int set_user_msr(struct task_struct *task, unsigned long msr)
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return 0;
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}
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+static unsigned long get_user_ckpt_msr(struct task_struct *task)
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+{
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+ return task->thread.ckpt_regs.msr | task->thread.fpexc_mode;
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+}
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+
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+static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr)
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+{
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+ task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE;
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+ task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE;
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+ return 0;
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+}
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+
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+static int set_user_ckpt_trap(struct task_struct *task, unsigned long trap)
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+{
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+ task->thread.ckpt_regs.trap = trap & 0xfff0;
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+ return 0;
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+}
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+#endif
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+
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#ifdef CONFIG_PPC64
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static int get_user_dscr(struct task_struct *task, unsigned long *data)
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{
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@@ -358,6 +382,29 @@ static int gpr_set(struct task_struct *target, const struct user_regset *regset,
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return ret;
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}
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+/*
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+ * When the transaction is active, 'transact_fp' holds the current running
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+ * value of all FPR registers and 'fp_state' holds the last checkpointed
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+ * value of all FPR registers for the current transaction. When transaction
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+ * is not active 'fp_state' holds the current running state of all the FPR
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+ * registers. So this function which returns the current running values of
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+ * all the FPR registers, needs to know whether any transaction is active
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+ * or not.
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+ *
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+ * Userspace interface buffer layout:
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+ *
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+ * struct data {
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+ * u64 fpr[32];
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+ * u64 fpscr;
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+ * };
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+ *
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+ * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM
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+ * which determines the final code in this function. All the combinations of
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+ * these two config options are possible except the one below as transactional
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+ * memory config pulls in CONFIG_VSX automatically.
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+ *
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+ * !defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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+ */
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static int fpr_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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@@ -368,14 +415,31 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
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#endif
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flush_fp_to_thread(target);
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-#ifdef CONFIG_VSX
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+#if defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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+ /* copy to local buffer then write that out */
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
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+ flush_altivec_to_thread(target);
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+ flush_tmregs_to_thread(target);
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+ for (i = 0; i < 32 ; i++)
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+ buf[i] = target->thread.TS_TRANS_FPR(i);
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+ buf[32] = target->thread.transact_fp.fpscr;
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+ } else {
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+ for (i = 0; i < 32 ; i++)
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+ buf[i] = target->thread.TS_FPR(i);
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+ buf[32] = target->thread.fp_state.fpscr;
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+ }
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+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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+#endif
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+
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+#if defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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/* copy to local buffer then write that out */
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for (i = 0; i < 32 ; i++)
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buf[i] = target->thread.TS_FPR(i);
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buf[32] = target->thread.fp_state.fpscr;
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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+#endif
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-#else
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+#if !defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
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offsetof(struct thread_fp_state, fpr[32]));
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@@ -384,6 +448,29 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
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#endif
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}
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+/*
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+ * When the transaction is active, 'transact_fp' holds the current running
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+ * value of all FPR registers and 'fp_state' holds the last checkpointed
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+ * value of all FPR registers for the current transaction. When transaction
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+ * is not active 'fp_state' holds the current running state of all the FPR
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+ * registers. So this function which setss the current running values of
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+ * all the FPR registers, needs to know whether any transaction is active
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+ * or not.
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+ *
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+ * Userspace interface buffer layout:
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+ *
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+ * struct data {
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+ * u64 fpr[32];
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+ * u64 fpscr;
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+ * };
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+ *
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+ * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM
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+ * which determines the final code in this function. All the combinations of
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+ * these two config options are possible except the one below as transactional
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+ * memory config pulls in CONFIG_VSX automatically.
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+ *
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+ * !defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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+ */
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static int fpr_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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@@ -394,7 +481,27 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
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#endif
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flush_fp_to_thread(target);
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-#ifdef CONFIG_VSX
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+#if defined(CONFIG_VSX) && defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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+ /* copy to local buffer then write that out */
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+ i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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+ if (i)
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+ return i;
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+
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
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+ flush_altivec_to_thread(target);
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+ flush_tmregs_to_thread(target);
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+ for (i = 0; i < 32 ; i++)
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+ target->thread.TS_TRANS_FPR(i) = buf[i];
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+ target->thread.transact_fp.fpscr = buf[32];
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+ } else {
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+ for (i = 0; i < 32 ; i++)
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+ target->thread.TS_FPR(i) = buf[i];
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+ target->thread.fp_state.fpscr = buf[32];
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+ }
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+ return 0;
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+#endif
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+
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+#if defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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/* copy to local buffer then write that out */
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i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
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if (i)
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@@ -403,7 +510,9 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
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target->thread.TS_FPR(i) = buf[i];
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target->thread.fp_state.fpscr = buf[32];
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return 0;
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-#else
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+#endif
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+
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+#if !defined(CONFIG_VSX) && !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
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BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
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offsetof(struct thread_fp_state, fpr[32]));
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@@ -433,10 +542,28 @@ static int vr_active(struct task_struct *target,
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return target->thread.used_vr ? regset->n : 0;
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}
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+/*
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+ * When the transaction is active, 'transact_vr' holds the current running
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+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
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+ * value of all the VMX registers for the current transaction to fall back
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+ * on in case it aborts. When transaction is not active 'vr_state' holds
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+ * the current running state of all the VMX registers. So this function which
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+ * gets the current running values of all the VMX registers, needs to know
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+ * whether any transaction is active or not.
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+ *
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+ * Userspace interface buffer layout:
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+ *
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+ * struct data {
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+ * vector128 vr[32];
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+ * vector128 vscr;
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+ * vector128 vrsave;
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+ * };
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+ */
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static int vr_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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+ struct thread_vr_state *addr;
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int ret;
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flush_altivec_to_thread(target);
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@@ -444,8 +571,19 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
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BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
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offsetof(struct thread_vr_state, vr[32]));
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
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+ flush_fp_to_thread(target);
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+ flush_tmregs_to_thread(target);
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+ addr = &target->thread.transact_vr;
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+ } else {
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+ addr = &target->thread.vr_state;
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+ }
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+#else
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+ addr = &target->thread.vr_state;
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+#endif
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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- &target->thread.vr_state, 0,
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+ addr, 0,
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33 * sizeof(vector128));
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if (!ret) {
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/*
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@@ -456,7 +594,16 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
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u32 word;
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} vrsave;
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memset(&vrsave, 0, sizeof(vrsave));
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+
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
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+ vrsave.word = target->thread.transact_vrsave;
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+ else
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+ vrsave.word = target->thread.vrsave;
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+#else
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vrsave.word = target->thread.vrsave;
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+#endif
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+
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
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33 * sizeof(vector128), -1);
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}
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@@ -464,10 +611,28 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
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return ret;
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}
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+/*
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+ * When the transaction is active, 'transact_vr' holds the current running
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+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
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+ * value of all the VMX registers for the current transaction to fall back
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+ * on in case it aborts. When transaction is not active 'vr_state' holds
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+ * the current running state of all the VMX registers. So this function which
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+ * sets the current running values of all the VMX registers, needs to know
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+ * whether any transaction is active or not.
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+ *
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+ * Userspace interface buffer layout:
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+ *
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+ * struct data {
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+ * vector128 vr[32];
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+ * vector128 vscr;
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+ * vector128 vrsave;
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+ * };
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+ */
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static int vr_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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+ struct thread_vr_state *addr;
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int ret;
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flush_altivec_to_thread(target);
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@@ -475,8 +640,19 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
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BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
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offsetof(struct thread_vr_state, vr[32]));
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
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+ flush_fp_to_thread(target);
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+ flush_tmregs_to_thread(target);
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+ addr = &target->thread.transact_vr;
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+ } else {
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+ addr = &target->thread.vr_state;
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+ }
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+#else
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+ addr = &target->thread.vr_state;
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+#endif
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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- &target->thread.vr_state, 0,
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+ addr, 0,
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33 * sizeof(vector128));
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if (!ret && count > 0) {
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/*
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@@ -487,11 +663,28 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
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u32 word;
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} vrsave;
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memset(&vrsave, 0, sizeof(vrsave));
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+
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
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+ vrsave.word = target->thread.transact_vrsave;
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+ else
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+ vrsave.word = target->thread.vrsave;
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+#else
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vrsave.word = target->thread.vrsave;
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+#endif
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
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33 * sizeof(vector128), -1);
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- if (!ret)
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+ if (!ret) {
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+
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
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+ target->thread.transact_vrsave = vrsave.word;
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+ else
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+ target->thread.vrsave = vrsave.word;
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+#else
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target->thread.vrsave = vrsave.word;
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+#endif
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+ }
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}
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return ret;
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@@ -512,6 +705,21 @@ static int vsr_active(struct task_struct *target,
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return target->thread.used_vsr ? regset->n : 0;
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}
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+/*
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|
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+ * When the transaction is active, 'transact_fp' holds the current running
|
|
|
+ * value of all FPR registers and 'fp_state' holds the last checkpointed
|
|
|
+ * value of all FPR registers for the current transaction. When transaction
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|
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+ * is not active 'fp_state' holds the current running state of all the FPR
|
|
|
+ * registers. So this function which returns the current running values of
|
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|
+ * all the FPR registers, needs to know whether any transaction is active
|
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+ * or not.
|
|
|
+ *
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+ * Userspace interface buffer layout:
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+ *
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+ * struct data {
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+ * u64 vsx[32];
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+ * };
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+ */
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static int vsr_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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@@ -519,16 +727,47 @@ static int vsr_get(struct task_struct *target, const struct user_regset *regset,
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u64 buf[32];
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int ret, i;
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ flush_fp_to_thread(target);
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+ flush_altivec_to_thread(target);
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+ flush_tmregs_to_thread(target);
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+#endif
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|
flush_vsx_to_thread(target);
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|
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+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
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+ for (i = 0; i < 32 ; i++)
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+ buf[i] = target->thread.
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+ transact_fp.fpr[i][TS_VSRLOWOFFSET];
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+ } else {
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+ for (i = 0; i < 32 ; i++)
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+ buf[i] = target->thread.
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+ fp_state.fpr[i][TS_VSRLOWOFFSET];
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+ }
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+#else
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|
for (i = 0; i < 32 ; i++)
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buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
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+#endif
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|
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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buf, 0, 32 * sizeof(double));
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return ret;
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}
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|
|
|
|
|
+/*
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|
|
+ * When the transaction is active, 'transact_fp' holds the current running
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|
|
+ * value of all FPR registers and 'fp_state' holds the last checkpointed
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|
|
+ * value of all FPR registers for the current transaction. When transaction
|
|
|
+ * is not active 'fp_state' holds the current running state of all the FPR
|
|
|
+ * registers. So this function which sets the current running values of all
|
|
|
+ * the FPR registers, needs to know whether any transaction is active or not.
|
|
|
+ *
|
|
|
+ * Userspace interface buffer layout:
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * u64 vsx[32];
|
|
|
+ * };
|
|
|
+ */
|
|
|
static int vsr_set(struct task_struct *target, const struct user_regset *regset,
|
|
|
unsigned int pos, unsigned int count,
|
|
|
const void *kbuf, const void __user *ubuf)
|
|
|
@@ -536,12 +775,30 @@ static int vsr_set(struct task_struct *target, const struct user_regset *regset,
|
|
|
u64 buf[32];
|
|
|
int ret,i;
|
|
|
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+#endif
|
|
|
flush_vsx_to_thread(target);
|
|
|
|
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
buf, 0, 32 * sizeof(double));
|
|
|
+
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ if (MSR_TM_ACTIVE(target->thread.regs->msr)) {
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ target->thread.transact_fp.
|
|
|
+ fpr[i][TS_VSRLOWOFFSET] = buf[i];
|
|
|
+ } else {
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ target->thread.fp_state.
|
|
|
+ fpr[i][TS_VSRLOWOFFSET] = buf[i];
|
|
|
+ }
|
|
|
+#else
|
|
|
for (i = 0; i < 32 ; i++)
|
|
|
target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
|
|
|
+#endif
|
|
|
|
|
|
|
|
|
return ret;
|
|
|
@@ -614,143 +871,1277 @@ static int evr_set(struct task_struct *target, const struct user_regset *regset,
|
|
|
}
|
|
|
#endif /* CONFIG_SPE */
|
|
|
|
|
|
-
|
|
|
-/*
|
|
|
- * These are our native regset flavors.
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+/**
|
|
|
+ * tm_cgpr_active - get active number of registers in CGPR
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ *
|
|
|
+ * This function checks for the active number of available
|
|
|
+ * regisers in transaction checkpointed GPR category.
|
|
|
*/
|
|
|
-enum powerpc_regset {
|
|
|
- REGSET_GPR,
|
|
|
- REGSET_FPR,
|
|
|
-#ifdef CONFIG_ALTIVEC
|
|
|
- REGSET_VMX,
|
|
|
-#endif
|
|
|
-#ifdef CONFIG_VSX
|
|
|
- REGSET_VSX,
|
|
|
-#endif
|
|
|
-#ifdef CONFIG_SPE
|
|
|
- REGSET_SPE,
|
|
|
-#endif
|
|
|
-};
|
|
|
-
|
|
|
-static const struct user_regset native_regsets[] = {
|
|
|
- [REGSET_GPR] = {
|
|
|
- .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
|
|
|
- .size = sizeof(long), .align = sizeof(long),
|
|
|
- .get = gpr_get, .set = gpr_set
|
|
|
- },
|
|
|
- [REGSET_FPR] = {
|
|
|
- .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
|
|
|
- .size = sizeof(double), .align = sizeof(double),
|
|
|
- .get = fpr_get, .set = fpr_set
|
|
|
- },
|
|
|
-#ifdef CONFIG_ALTIVEC
|
|
|
- [REGSET_VMX] = {
|
|
|
- .core_note_type = NT_PPC_VMX, .n = 34,
|
|
|
- .size = sizeof(vector128), .align = sizeof(vector128),
|
|
|
- .active = vr_active, .get = vr_get, .set = vr_set
|
|
|
- },
|
|
|
-#endif
|
|
|
-#ifdef CONFIG_VSX
|
|
|
- [REGSET_VSX] = {
|
|
|
- .core_note_type = NT_PPC_VSX, .n = 32,
|
|
|
- .size = sizeof(double), .align = sizeof(double),
|
|
|
- .active = vsr_active, .get = vsr_get, .set = vsr_set
|
|
|
- },
|
|
|
-#endif
|
|
|
-#ifdef CONFIG_SPE
|
|
|
- [REGSET_SPE] = {
|
|
|
- .core_note_type = NT_PPC_SPE, .n = 35,
|
|
|
- .size = sizeof(u32), .align = sizeof(u32),
|
|
|
- .active = evr_active, .get = evr_get, .set = evr_set
|
|
|
- },
|
|
|
-#endif
|
|
|
-};
|
|
|
+static int tm_cgpr_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
|
|
|
-static const struct user_regset_view user_ppc_native_view = {
|
|
|
- .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
|
|
|
- .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
|
|
|
-};
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return 0;
|
|
|
|
|
|
-#ifdef CONFIG_PPC64
|
|
|
-#include <linux/compat.h>
|
|
|
+ return regset->n;
|
|
|
+}
|
|
|
|
|
|
-static int gpr32_get(struct task_struct *target,
|
|
|
- const struct user_regset *regset,
|
|
|
- unsigned int pos, unsigned int count,
|
|
|
- void *kbuf, void __user *ubuf)
|
|
|
+/**
|
|
|
+ * tm_cgpr_get - get CGPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy from.
|
|
|
+ * @ubuf: User buffer to copy into.
|
|
|
+ *
|
|
|
+ * This function gets transaction checkpointed GPR registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active, 'ckpt_regs' holds all the checkpointed
|
|
|
+ * GPR register values for the current transaction to fall back on if it
|
|
|
+ * aborts in between. This function gets those checkpointed GPR registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * struct pt_regs ckpt_regs;
|
|
|
+ * };
|
|
|
+ */
|
|
|
+static int tm_cgpr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
{
|
|
|
- const unsigned long *regs = &target->thread.regs->gpr[0];
|
|
|
- compat_ulong_t *k = kbuf;
|
|
|
- compat_ulong_t __user *u = ubuf;
|
|
|
- compat_ulong_t reg;
|
|
|
- int i;
|
|
|
+ int ret;
|
|
|
|
|
|
- if (target->thread.regs == NULL)
|
|
|
- return -EIO;
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
|
|
|
- if (!FULL_REGS(target->thread.regs)) {
|
|
|
- /* We have a partial register set. Fill 14-31 with bogus values */
|
|
|
- for (i = 14; i < 32; i++)
|
|
|
- target->thread.regs->gpr[i] = NV_REG_POISON;
|
|
|
- }
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
|
|
|
- pos /= sizeof(reg);
|
|
|
- count /= sizeof(reg);
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
|
|
|
- if (kbuf)
|
|
|
- for (; count > 0 && pos < PT_MSR; --count)
|
|
|
- *k++ = regs[pos++];
|
|
|
- else
|
|
|
- for (; count > 0 && pos < PT_MSR; --count)
|
|
|
- if (__put_user((compat_ulong_t) regs[pos++], u++))
|
|
|
- return -EFAULT;
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ckpt_regs,
|
|
|
+ 0, offsetof(struct pt_regs, msr));
|
|
|
+ if (!ret) {
|
|
|
+ unsigned long msr = get_user_ckpt_msr(target);
|
|
|
|
|
|
- if (count > 0 && pos == PT_MSR) {
|
|
|
- reg = get_user_msr(target);
|
|
|
- if (kbuf)
|
|
|
- *k++ = reg;
|
|
|
- else if (__put_user(reg, u++))
|
|
|
- return -EFAULT;
|
|
|
- ++pos;
|
|
|
- --count;
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
|
|
|
+ offsetof(struct pt_regs, msr),
|
|
|
+ offsetof(struct pt_regs, msr) +
|
|
|
+ sizeof(msr));
|
|
|
}
|
|
|
|
|
|
- if (kbuf)
|
|
|
- for (; count > 0 && pos < PT_REGS_COUNT; --count)
|
|
|
- *k++ = regs[pos++];
|
|
|
- else
|
|
|
- for (; count > 0 && pos < PT_REGS_COUNT; --count)
|
|
|
- if (__put_user((compat_ulong_t) regs[pos++], u++))
|
|
|
- return -EFAULT;
|
|
|
+ BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
|
|
|
+ offsetof(struct pt_regs, msr) + sizeof(long));
|
|
|
|
|
|
- kbuf = k;
|
|
|
- ubuf = u;
|
|
|
- pos *= sizeof(reg);
|
|
|
- count *= sizeof(reg);
|
|
|
- return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
|
|
|
- PT_REGS_COUNT * sizeof(reg), -1);
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ckpt_regs.orig_gpr3,
|
|
|
+ offsetof(struct pt_regs, orig_gpr3),
|
|
|
+ sizeof(struct pt_regs));
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
|
|
|
+ sizeof(struct pt_regs), -1);
|
|
|
+
|
|
|
+ return ret;
|
|
|
}
|
|
|
|
|
|
-static int gpr32_set(struct task_struct *target,
|
|
|
- const struct user_regset *regset,
|
|
|
- unsigned int pos, unsigned int count,
|
|
|
- const void *kbuf, const void __user *ubuf)
|
|
|
+/*
|
|
|
+ * tm_cgpr_set - set the CGPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy into.
|
|
|
+ * @ubuf: User buffer to copy from.
|
|
|
+ *
|
|
|
+ * This function sets in transaction checkpointed GPR registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active, 'ckpt_regs' holds the checkpointed
|
|
|
+ * GPR register values for the current transaction to fall back on if it
|
|
|
+ * aborts in between. This function sets those checkpointed GPR registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * struct pt_regs ckpt_regs;
|
|
|
+ * };
|
|
|
+ */
|
|
|
+static int tm_cgpr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
{
|
|
|
- unsigned long *regs = &target->thread.regs->gpr[0];
|
|
|
- const compat_ulong_t *k = kbuf;
|
|
|
- const compat_ulong_t __user *u = ubuf;
|
|
|
- compat_ulong_t reg;
|
|
|
+ unsigned long reg;
|
|
|
+ int ret;
|
|
|
|
|
|
- if (target->thread.regs == NULL)
|
|
|
- return -EIO;
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
|
|
|
- CHECK_FULL_REGS(target->thread.regs);
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
|
|
|
- pos /= sizeof(reg);
|
|
|
- count /= sizeof(reg);
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
|
|
|
- if (kbuf)
|
|
|
- for (; count > 0 && pos < PT_MSR; --count)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ckpt_regs,
|
|
|
+ 0, PT_MSR * sizeof(reg));
|
|
|
+
|
|
|
+ if (!ret && count > 0) {
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
|
|
|
+ PT_MSR * sizeof(reg),
|
|
|
+ (PT_MSR + 1) * sizeof(reg));
|
|
|
+ if (!ret)
|
|
|
+ ret = set_user_ckpt_msr(target, reg);
|
|
|
+ }
|
|
|
+
|
|
|
+ BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
|
|
|
+ offsetof(struct pt_regs, msr) + sizeof(long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ckpt_regs.orig_gpr3,
|
|
|
+ PT_ORIG_R3 * sizeof(reg),
|
|
|
+ (PT_MAX_PUT_REG + 1) * sizeof(reg));
|
|
|
+
|
|
|
+ if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
|
|
|
+ ret = user_regset_copyin_ignore(
|
|
|
+ &pos, &count, &kbuf, &ubuf,
|
|
|
+ (PT_MAX_PUT_REG + 1) * sizeof(reg),
|
|
|
+ PT_TRAP * sizeof(reg));
|
|
|
+
|
|
|
+ if (!ret && count > 0) {
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®,
|
|
|
+ PT_TRAP * sizeof(reg),
|
|
|
+ (PT_TRAP + 1) * sizeof(reg));
|
|
|
+ if (!ret)
|
|
|
+ ret = set_user_ckpt_trap(target, reg);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin_ignore(
|
|
|
+ &pos, &count, &kbuf, &ubuf,
|
|
|
+ (PT_TRAP + 1) * sizeof(reg), -1);
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cfpr_active - get active number of registers in CFPR
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ *
|
|
|
+ * This function checks for the active number of available
|
|
|
+ * regisers in transaction checkpointed FPR category.
|
|
|
+ */
|
|
|
+static int tm_cfpr_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ return regset->n;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cfpr_get - get CFPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy from.
|
|
|
+ * @ubuf: User buffer to copy into.
|
|
|
+ *
|
|
|
+ * This function gets in transaction checkpointed FPR registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'fp_state' holds the checkpointed
|
|
|
+ * values for the current transaction to fall back on if it aborts
|
|
|
+ * in between. This function gets those checkpointed FPR registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * u64 fpr[32];
|
|
|
+ * u64 fpscr;
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cfpr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ u64 buf[33];
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ /* copy to local buffer then write that out */
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ buf[i] = target->thread.TS_FPR(i);
|
|
|
+ buf[32] = target->thread.fp_state.fpscr;
|
|
|
+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cfpr_set - set CFPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy into.
|
|
|
+ * @ubuf: User buffer to copy from.
|
|
|
+ *
|
|
|
+ * This function sets in transaction checkpointed FPR registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'fp_state' holds the checkpointed
|
|
|
+ * FPR register values for the current transaction to fall back on
|
|
|
+ * if it aborts in between. This function sets these checkpointed
|
|
|
+ * FPR registers. The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * u64 fpr[32];
|
|
|
+ * u64 fpscr;
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cfpr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ u64 buf[33];
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ /* copy to local buffer then write that out */
|
|
|
+ i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
|
|
|
+ if (i)
|
|
|
+ return i;
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ target->thread.TS_FPR(i) = buf[i];
|
|
|
+ target->thread.fp_state.fpscr = buf[32];
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvmx_active - get active number of registers in CVMX
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ *
|
|
|
+ * This function checks for the active number of available
|
|
|
+ * regisers in checkpointed VMX category.
|
|
|
+ */
|
|
|
+static int tm_cvmx_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ return regset->n;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvmx_get - get CMVX registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy from.
|
|
|
+ * @ubuf: User buffer to copy into.
|
|
|
+ *
|
|
|
+ * This function gets in transaction checkpointed VMX registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'vr_state' and 'vr_save' hold
|
|
|
+ * the checkpointed values for the current transaction to fall
|
|
|
+ * back on if it aborts in between. The userspace interface buffer
|
|
|
+ * layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * vector128 vr[32];
|
|
|
+ * vector128 vscr;
|
|
|
+ * vector128 vrsave;
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cvmx_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ /* Flush the state */
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.vr_state, 0,
|
|
|
+ 33 * sizeof(vector128));
|
|
|
+ if (!ret) {
|
|
|
+ /*
|
|
|
+ * Copy out only the low-order word of vrsave.
|
|
|
+ */
|
|
|
+ union {
|
|
|
+ elf_vrreg_t reg;
|
|
|
+ u32 word;
|
|
|
+ } vrsave;
|
|
|
+ memset(&vrsave, 0, sizeof(vrsave));
|
|
|
+ vrsave.word = target->thread.vrsave;
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
|
|
|
+ 33 * sizeof(vector128), -1);
|
|
|
+ }
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvmx_set - set CMVX registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy into.
|
|
|
+ * @ubuf: User buffer to copy from.
|
|
|
+ *
|
|
|
+ * This function sets in transaction checkpointed VMX registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'vr_state' and 'vr_save' hold
|
|
|
+ * the checkpointed values for the current transaction to fall
|
|
|
+ * back on if it aborts in between. The userspace interface buffer
|
|
|
+ * layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * vector128 vr[32];
|
|
|
+ * vector128 vscr;
|
|
|
+ * vector128 vrsave;
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cvmx_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.vr_state, 0,
|
|
|
+ 33 * sizeof(vector128));
|
|
|
+ if (!ret && count > 0) {
|
|
|
+ /*
|
|
|
+ * We use only the low-order word of vrsave.
|
|
|
+ */
|
|
|
+ union {
|
|
|
+ elf_vrreg_t reg;
|
|
|
+ u32 word;
|
|
|
+ } vrsave;
|
|
|
+ memset(&vrsave, 0, sizeof(vrsave));
|
|
|
+ vrsave.word = target->thread.vrsave;
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
|
|
|
+ 33 * sizeof(vector128), -1);
|
|
|
+ if (!ret)
|
|
|
+ target->thread.vrsave = vrsave.word;
|
|
|
+ }
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvsx_active - get active number of registers in CVSX
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ *
|
|
|
+ * This function checks for the active number of available
|
|
|
+ * regisers in transaction checkpointed VSX category.
|
|
|
+ */
|
|
|
+static int tm_cvsx_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ flush_vsx_to_thread(target);
|
|
|
+ return target->thread.used_vsr ? regset->n : 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvsx_get - get CVSX registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy from.
|
|
|
+ * @ubuf: User buffer to copy into.
|
|
|
+ *
|
|
|
+ * This function gets in transaction checkpointed VSX registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'fp_state' holds the checkpointed
|
|
|
+ * values for the current transaction to fall back on if it aborts
|
|
|
+ * in between. This function gets those checkpointed VSX registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * u64 vsx[32];
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cvsx_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ u64 buf[32];
|
|
|
+ int ret, i;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ /* Flush the state */
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+ flush_vsx_to_thread(target);
|
|
|
+
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ buf, 0, 32 * sizeof(double));
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_cvsx_set - set CFPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy into.
|
|
|
+ * @ubuf: User buffer to copy from.
|
|
|
+ *
|
|
|
+ * This function sets in transaction checkpointed VSX registers.
|
|
|
+ *
|
|
|
+ * When the transaction is active 'fp_state' holds the checkpointed
|
|
|
+ * VSX register values for the current transaction to fall back on
|
|
|
+ * if it aborts in between. This function sets these checkpointed
|
|
|
+ * FPR registers. The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct data {
|
|
|
+ * u64 vsx[32];
|
|
|
+ *};
|
|
|
+ */
|
|
|
+static int tm_cvsx_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ u64 buf[32];
|
|
|
+ int ret, i;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ /* Flush the state */
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+ flush_vsx_to_thread(target);
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ buf, 0, 32 * sizeof(double));
|
|
|
+ for (i = 0; i < 32 ; i++)
|
|
|
+ target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_spr_active - get active number of registers in TM SPR
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ *
|
|
|
+ * This function checks the active number of available
|
|
|
+ * regisers in the transactional memory SPR category.
|
|
|
+ */
|
|
|
+static int tm_spr_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ return regset->n;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_spr_get - get the TM related SPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy from.
|
|
|
+ * @ubuf: User buffer to copy into.
|
|
|
+ *
|
|
|
+ * This function gets transactional memory related SPR registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct {
|
|
|
+ * u64 tm_tfhar;
|
|
|
+ * u64 tm_texasr;
|
|
|
+ * u64 tm_tfiar;
|
|
|
+ * };
|
|
|
+ */
|
|
|
+static int tm_spr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
|
|
|
+ BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
|
|
|
+ BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ /* Flush the states */
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ /* TFHAR register */
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tfhar, 0, sizeof(u64));
|
|
|
+
|
|
|
+ /* TEXASR register */
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_texasr, sizeof(u64),
|
|
|
+ 2 * sizeof(u64));
|
|
|
+
|
|
|
+ /* TFIAR register */
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tfiar,
|
|
|
+ 2 * sizeof(u64), 3 * sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * tm_spr_set - set the TM related SPR registers
|
|
|
+ * @target: The target task.
|
|
|
+ * @regset: The user regset structure.
|
|
|
+ * @pos: The buffer position.
|
|
|
+ * @count: Number of bytes to copy.
|
|
|
+ * @kbuf: Kernel buffer to copy into.
|
|
|
+ * @ubuf: User buffer to copy from.
|
|
|
+ *
|
|
|
+ * This function sets transactional memory related SPR registers.
|
|
|
+ * The userspace interface buffer layout is as follows.
|
|
|
+ *
|
|
|
+ * struct {
|
|
|
+ * u64 tm_tfhar;
|
|
|
+ * u64 tm_texasr;
|
|
|
+ * u64 tm_tfiar;
|
|
|
+ * };
|
|
|
+ */
|
|
|
+static int tm_spr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
|
|
|
+ BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
|
|
|
+ BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ /* Flush the states */
|
|
|
+ flush_fp_to_thread(target);
|
|
|
+ flush_altivec_to_thread(target);
|
|
|
+ flush_tmregs_to_thread(target);
|
|
|
+
|
|
|
+ /* TFHAR register */
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tfhar, 0, sizeof(u64));
|
|
|
+
|
|
|
+ /* TEXASR register */
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_texasr, sizeof(u64),
|
|
|
+ 2 * sizeof(u64));
|
|
|
+
|
|
|
+ /* TFIAR register */
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tfiar,
|
|
|
+ 2 * sizeof(u64), 3 * sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_tar_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return regset->n;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_tar_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tar, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_tar_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_tar, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_ppr_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return regset->n;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+static int tm_ppr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_ppr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_ppr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_ppr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_dscr_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return regset->n;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_dscr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_dscr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_dscr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_TM))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!MSR_TM_ACTIVE(target->thread.regs->msr))
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tm_dscr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
|
|
|
+
|
|
|
+#ifdef CONFIG_PPC64
|
|
|
+static int ppr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ppr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int ppr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ppr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int dscr_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.dscr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+static int dscr_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.dscr, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
+static int tar_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tar, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+static int tar_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.tar, 0, sizeof(u64));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int ebb_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (target->thread.used_ebb)
|
|
|
+ return regset->n;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int ebb_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
|
|
|
+ BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (!target->thread.used_ebb)
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ebbrr, 0, 3 * sizeof(unsigned long));
|
|
|
+}
|
|
|
+
|
|
|
+static int ebb_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
|
|
|
+ BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ if (target->thread.used_ebb)
|
|
|
+ return -ENODATA;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ebbrr, 0, sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.ebbhr, sizeof(unsigned long),
|
|
|
+ 2 * sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.bescr,
|
|
|
+ 2 * sizeof(unsigned long), 3 * sizeof(unsigned long));
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+static int pmu_active(struct task_struct *target,
|
|
|
+ const struct user_regset *regset)
|
|
|
+{
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ return regset->n;
|
|
|
+}
|
|
|
+
|
|
|
+static int pmu_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
|
|
|
+ BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
|
|
|
+ BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
|
|
|
+ BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.siar, 0,
|
|
|
+ 5 * sizeof(unsigned long));
|
|
|
+}
|
|
|
+
|
|
|
+static int pmu_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ /* Build tests */
|
|
|
+ BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
|
|
|
+ BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
|
|
|
+ BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
|
|
|
+ BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
|
|
|
+
|
|
|
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.siar, 0,
|
|
|
+ sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.sdar, sizeof(unsigned long),
|
|
|
+ 2 * sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.sier, 2 * sizeof(unsigned long),
|
|
|
+ 3 * sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.mmcr2, 3 * sizeof(unsigned long),
|
|
|
+ 4 * sizeof(unsigned long));
|
|
|
+
|
|
|
+ if (!ret)
|
|
|
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
|
+ &target->thread.mmcr0, 4 * sizeof(unsigned long),
|
|
|
+ 5 * sizeof(unsigned long));
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+#endif
|
|
|
+/*
|
|
|
+ * These are our native regset flavors.
|
|
|
+ */
|
|
|
+enum powerpc_regset {
|
|
|
+ REGSET_GPR,
|
|
|
+ REGSET_FPR,
|
|
|
+#ifdef CONFIG_ALTIVEC
|
|
|
+ REGSET_VMX,
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_VSX
|
|
|
+ REGSET_VSX,
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_SPE
|
|
|
+ REGSET_SPE,
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ REGSET_TM_CGPR, /* TM checkpointed GPR registers */
|
|
|
+ REGSET_TM_CFPR, /* TM checkpointed FPR registers */
|
|
|
+ REGSET_TM_CVMX, /* TM checkpointed VMX registers */
|
|
|
+ REGSET_TM_CVSX, /* TM checkpointed VSX registers */
|
|
|
+ REGSET_TM_SPR, /* TM specific SPR registers */
|
|
|
+ REGSET_TM_CTAR, /* TM checkpointed TAR register */
|
|
|
+ REGSET_TM_CPPR, /* TM checkpointed PPR register */
|
|
|
+ REGSET_TM_CDSCR, /* TM checkpointed DSCR register */
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC64
|
|
|
+ REGSET_PPR, /* PPR register */
|
|
|
+ REGSET_DSCR, /* DSCR register */
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
+ REGSET_TAR, /* TAR register */
|
|
|
+ REGSET_EBB, /* EBB registers */
|
|
|
+ REGSET_PMR, /* Performance Monitor Registers */
|
|
|
+#endif
|
|
|
+};
|
|
|
+
|
|
|
+static const struct user_regset native_regsets[] = {
|
|
|
+ [REGSET_GPR] = {
|
|
|
+ .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
|
|
|
+ .size = sizeof(long), .align = sizeof(long),
|
|
|
+ .get = gpr_get, .set = gpr_set
|
|
|
+ },
|
|
|
+ [REGSET_FPR] = {
|
|
|
+ .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .get = fpr_get, .set = fpr_set
|
|
|
+ },
|
|
|
+#ifdef CONFIG_ALTIVEC
|
|
|
+ [REGSET_VMX] = {
|
|
|
+ .core_note_type = NT_PPC_VMX, .n = 34,
|
|
|
+ .size = sizeof(vector128), .align = sizeof(vector128),
|
|
|
+ .active = vr_active, .get = vr_get, .set = vr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_VSX
|
|
|
+ [REGSET_VSX] = {
|
|
|
+ .core_note_type = NT_PPC_VSX, .n = 32,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .active = vsr_active, .get = vsr_get, .set = vsr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_SPE
|
|
|
+ [REGSET_SPE] = {
|
|
|
+ .core_note_type = NT_PPC_SPE, .n = 35,
|
|
|
+ .size = sizeof(u32), .align = sizeof(u32),
|
|
|
+ .active = evr_active, .get = evr_get, .set = evr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ [REGSET_TM_CGPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
|
|
|
+ .size = sizeof(long), .align = sizeof(long),
|
|
|
+ .active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CFPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CVMX] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
|
|
|
+ .size = sizeof(vector128), .align = sizeof(vector128),
|
|
|
+ .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CVSX] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_SPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CTAR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CTAR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CPPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CPPR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CDSCR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC64
|
|
|
+ [REGSET_PPR] = {
|
|
|
+ .core_note_type = NT_PPC_PPR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = ppr_get, .set = ppr_set
|
|
|
+ },
|
|
|
+ [REGSET_DSCR] = {
|
|
|
+ .core_note_type = NT_PPC_DSCR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = dscr_get, .set = dscr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
+ [REGSET_TAR] = {
|
|
|
+ .core_note_type = NT_PPC_TAR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = tar_get, .set = tar_set
|
|
|
+ },
|
|
|
+ [REGSET_EBB] = {
|
|
|
+ .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = ebb_active, .get = ebb_get, .set = ebb_set
|
|
|
+ },
|
|
|
+ [REGSET_PMR] = {
|
|
|
+ .core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = pmu_active, .get = pmu_get, .set = pmu_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+};
|
|
|
+
|
|
|
+static const struct user_regset_view user_ppc_native_view = {
|
|
|
+ .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
|
|
|
+ .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
|
|
|
+};
|
|
|
+
|
|
|
+#ifdef CONFIG_PPC64
|
|
|
+#include <linux/compat.h>
|
|
|
+
|
|
|
+static int gpr32_get_common(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf, bool tm_active)
|
|
|
+{
|
|
|
+ const unsigned long *regs = &target->thread.regs->gpr[0];
|
|
|
+ const unsigned long *ckpt_regs;
|
|
|
+ compat_ulong_t *k = kbuf;
|
|
|
+ compat_ulong_t __user *u = ubuf;
|
|
|
+ compat_ulong_t reg;
|
|
|
+ int i;
|
|
|
+
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ ckpt_regs = &target->thread.ckpt_regs.gpr[0];
|
|
|
+#endif
|
|
|
+ if (tm_active) {
|
|
|
+ regs = ckpt_regs;
|
|
|
+ } else {
|
|
|
+ if (target->thread.regs == NULL)
|
|
|
+ return -EIO;
|
|
|
+
|
|
|
+ if (!FULL_REGS(target->thread.regs)) {
|
|
|
+ /*
|
|
|
+ * We have a partial register set.
|
|
|
+ * Fill 14-31 with bogus values.
|
|
|
+ */
|
|
|
+ for (i = 14; i < 32; i++)
|
|
|
+ target->thread.regs->gpr[i] = NV_REG_POISON;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ pos /= sizeof(reg);
|
|
|
+ count /= sizeof(reg);
|
|
|
+
|
|
|
+ if (kbuf)
|
|
|
+ for (; count > 0 && pos < PT_MSR; --count)
|
|
|
+ *k++ = regs[pos++];
|
|
|
+ else
|
|
|
+ for (; count > 0 && pos < PT_MSR; --count)
|
|
|
+ if (__put_user((compat_ulong_t) regs[pos++], u++))
|
|
|
+ return -EFAULT;
|
|
|
+
|
|
|
+ if (count > 0 && pos == PT_MSR) {
|
|
|
+ reg = get_user_msr(target);
|
|
|
+ if (kbuf)
|
|
|
+ *k++ = reg;
|
|
|
+ else if (__put_user(reg, u++))
|
|
|
+ return -EFAULT;
|
|
|
+ ++pos;
|
|
|
+ --count;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (kbuf)
|
|
|
+ for (; count > 0 && pos < PT_REGS_COUNT; --count)
|
|
|
+ *k++ = regs[pos++];
|
|
|
+ else
|
|
|
+ for (; count > 0 && pos < PT_REGS_COUNT; --count)
|
|
|
+ if (__put_user((compat_ulong_t) regs[pos++], u++))
|
|
|
+ return -EFAULT;
|
|
|
+
|
|
|
+ kbuf = k;
|
|
|
+ ubuf = u;
|
|
|
+ pos *= sizeof(reg);
|
|
|
+ count *= sizeof(reg);
|
|
|
+ return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
|
|
|
+ PT_REGS_COUNT * sizeof(reg), -1);
|
|
|
+}
|
|
|
+
|
|
|
+static int gpr32_set_common(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf, bool tm_active)
|
|
|
+{
|
|
|
+ unsigned long *regs = &target->thread.regs->gpr[0];
|
|
|
+ unsigned long *ckpt_regs;
|
|
|
+ const compat_ulong_t *k = kbuf;
|
|
|
+ const compat_ulong_t __user *u = ubuf;
|
|
|
+ compat_ulong_t reg;
|
|
|
+
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ ckpt_regs = &target->thread.ckpt_regs.gpr[0];
|
|
|
+#endif
|
|
|
+
|
|
|
+ if (tm_active) {
|
|
|
+ regs = ckpt_regs;
|
|
|
+ } else {
|
|
|
+ regs = &target->thread.regs->gpr[0];
|
|
|
+
|
|
|
+ if (target->thread.regs == NULL)
|
|
|
+ return -EIO;
|
|
|
+
|
|
|
+ CHECK_FULL_REGS(target->thread.regs);
|
|
|
+ }
|
|
|
+
|
|
|
+ pos /= sizeof(reg);
|
|
|
+ count /= sizeof(reg);
|
|
|
+
|
|
|
+ if (kbuf)
|
|
|
+ for (; count > 0 && pos < PT_MSR; --count)
|
|
|
regs[pos++] = *k++;
|
|
|
else
|
|
|
for (; count > 0 && pos < PT_MSR; --count) {
|
|
|
@@ -804,6 +2195,40 @@ static int gpr32_set(struct task_struct *target,
|
|
|
(PT_TRAP + 1) * sizeof(reg), -1);
|
|
|
}
|
|
|
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+static int tm_cgpr32_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ return gpr32_get_common(target, regset, pos, count, kbuf, ubuf, 1);
|
|
|
+}
|
|
|
+
|
|
|
+static int tm_cgpr32_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ return gpr32_set_common(target, regset, pos, count, kbuf, ubuf, 1);
|
|
|
+}
|
|
|
+#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
|
|
|
+
|
|
|
+static int gpr32_get(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ void *kbuf, void __user *ubuf)
|
|
|
+{
|
|
|
+ return gpr32_get_common(target, regset, pos, count, kbuf, ubuf, 0);
|
|
|
+}
|
|
|
+
|
|
|
+static int gpr32_set(struct task_struct *target,
|
|
|
+ const struct user_regset *regset,
|
|
|
+ unsigned int pos, unsigned int count,
|
|
|
+ const void *kbuf, const void __user *ubuf)
|
|
|
+{
|
|
|
+ return gpr32_set_common(target, regset, pos, count, kbuf, ubuf, 0);
|
|
|
+}
|
|
|
+
|
|
|
/*
|
|
|
* These are the regset flavors matching the CONFIG_PPC32 native set.
|
|
|
*/
|
|
|
@@ -832,6 +2257,73 @@ static const struct user_regset compat_regsets[] = {
|
|
|
.active = evr_active, .get = evr_get, .set = evr_set
|
|
|
},
|
|
|
#endif
|
|
|
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
|
+ [REGSET_TM_CGPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
|
|
|
+ .size = sizeof(long), .align = sizeof(long),
|
|
|
+ .active = tm_cgpr_active,
|
|
|
+ .get = tm_cgpr32_get, .set = tm_cgpr32_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CFPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CVMX] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
|
|
|
+ .size = sizeof(vector128), .align = sizeof(vector128),
|
|
|
+ .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CVSX] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
|
|
|
+ .size = sizeof(double), .align = sizeof(double),
|
|
|
+ .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_SPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CTAR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CTAR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CPPR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CPPR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
|
|
|
+ },
|
|
|
+ [REGSET_TM_CDSCR] = {
|
|
|
+ .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC64
|
|
|
+ [REGSET_PPR] = {
|
|
|
+ .core_note_type = NT_PPC_PPR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = ppr_get, .set = ppr_set
|
|
|
+ },
|
|
|
+ [REGSET_DSCR] = {
|
|
|
+ .core_note_type = NT_PPC_DSCR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = dscr_get, .set = dscr_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
+#ifdef CONFIG_PPC_BOOK3S_64
|
|
|
+ [REGSET_TAR] = {
|
|
|
+ .core_note_type = NT_PPC_TAR, .n = 1,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .get = tar_get, .set = tar_set
|
|
|
+ },
|
|
|
+ [REGSET_EBB] = {
|
|
|
+ .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
|
|
|
+ .size = sizeof(u64), .align = sizeof(u64),
|
|
|
+ .active = ebb_active, .get = ebb_get, .set = ebb_set
|
|
|
+ },
|
|
|
+#endif
|
|
|
};
|
|
|
|
|
|
static const struct user_regset_view user_ppc_compat_view = {
|
Linus Torvalds