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@@ -2,7 +2,8 @@
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General Properties:
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- - compatible Should be "fsl,etsec-ptp"
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+ - compatible Should be "fsl,etsec-ptp" for eTSEC
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+ Should be "fsl,fman-ptp-timer" for DPAA FMan
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- reg Offset and length of the register set for the device
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- interrupts There should be at least two interrupts. Some devices
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have as many as four PTP related interrupts.
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@@ -43,14 +44,22 @@ Clock Properties:
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value, which will be directly written in those bits, that is why,
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according to reference manual, the next clock sources can be used:
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+ For eTSEC,
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<0> - external high precision timer reference clock (TSEC_TMR_CLK
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input is used for this purpose);
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<1> - eTSEC system clock;
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<2> - eTSEC1 transmit clock;
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<3> - RTC clock input.
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- When this attribute is not used, eTSEC system clock will serve as
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- IEEE 1588 timer reference clock.
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+ For DPAA FMan,
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+ <0> - external high precision timer reference clock (TMR_1588_CLK)
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+ <1> - MAC system clock (1/2 FMan clock)
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+ <2> - reserved
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+ <3> - RTC clock oscillator
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+
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+ When this attribute is not used, the IEEE 1588 timer reference clock
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+ will use the eTSEC system clock (for Gianfar) or the MAC system
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+ clock (for DPAA).
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Example:
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