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@@ -220,10 +220,126 @@ static inline u32 omap_usec_to_32k(u32 usec)
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return DIV_ROUND_UP_ULL(32768ULL * (u64)usec, 1000000ULL);
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}
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-/* Set oscillator setup time for omap3 */
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-static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
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+struct omap3_vc_timings {
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+ u32 voltsetup1;
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+ u32 voltsetup2;
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+};
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+
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+struct omap3_vc {
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+ struct voltagedomain *vd;
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+ u32 voltctrl;
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+ u32 voltsetup1;
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+ u32 voltsetup2;
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+ struct omap3_vc_timings timings[2];
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+};
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+static struct omap3_vc vc;
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+
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+void omap3_vc_set_pmic_signaling(int core_next_state)
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+{
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+ struct voltagedomain *vd = vc.vd;
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+ struct omap3_vc_timings *c = vc.timings;
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+ u32 voltctrl, voltsetup1, voltsetup2;
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+
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+ voltctrl = vc.voltctrl;
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+ voltsetup1 = vc.voltsetup1;
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+ voltsetup2 = vc.voltsetup2;
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+
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+ switch (core_next_state) {
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+ case PWRDM_POWER_OFF:
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+ voltctrl &= ~(OMAP3430_PRM_VOLTCTRL_AUTO_RET |
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+ OMAP3430_PRM_VOLTCTRL_AUTO_SLEEP);
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+ voltctrl |= OMAP3430_PRM_VOLTCTRL_AUTO_OFF;
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+ if (voltctrl & OMAP3430_PRM_VOLTCTRL_SEL_OFF)
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+ voltsetup2 = c->voltsetup2;
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+ else
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+ voltsetup1 = c->voltsetup1;
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+ break;
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+ case PWRDM_POWER_RET:
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+ default:
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+ c++;
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+ voltctrl &= ~(OMAP3430_PRM_VOLTCTRL_AUTO_OFF |
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+ OMAP3430_PRM_VOLTCTRL_AUTO_SLEEP);
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+ voltctrl |= OMAP3430_PRM_VOLTCTRL_AUTO_RET;
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+ voltsetup1 = c->voltsetup1;
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+ break;
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+ }
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+
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+ if (voltctrl != vc.voltctrl) {
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+ vd->write(voltctrl, OMAP3_PRM_VOLTCTRL_OFFSET);
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+ vc.voltctrl = voltctrl;
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+ }
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+ if (voltsetup1 != vc.voltsetup1) {
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+ vd->write(c->voltsetup1,
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+ OMAP3_PRM_VOLTSETUP1_OFFSET);
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+ vc.voltsetup1 = voltsetup1;
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+ }
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+ if (voltsetup2 != vc.voltsetup2) {
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+ vd->write(c->voltsetup2,
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+ OMAP3_PRM_VOLTSETUP2_OFFSET);
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+ vc.voltsetup2 = voltsetup2;
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+ }
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+}
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+
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+#define PRM_POLCTRL_TWL_MASK (OMAP3430_PRM_POLCTRL_CLKREQ_POL | \
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+ OMAP3430_PRM_POLCTRL_CLKREQ_POL)
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+#define PRM_POLCTRL_TWL_VAL OMAP3430_PRM_POLCTRL_CLKREQ_POL
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+
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+/*
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+ * Configure signal polarity for sys_clkreq and sys_off_mode pins
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+ * as the default values are wrong and can cause the system to hang
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+ * if any twl4030 scripts are loaded.
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+ */
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+static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
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+{
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+ u32 val;
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+
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+ if (vc.vd)
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+ return;
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+
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+ vc.vd = voltdm;
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+
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+ val = voltdm->read(OMAP3_PRM_POLCTRL_OFFSET);
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+ if (!(val & OMAP3430_PRM_POLCTRL_CLKREQ_POL) ||
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+ (val & OMAP3430_PRM_POLCTRL_CLKREQ_POL)) {
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+ val |= OMAP3430_PRM_POLCTRL_CLKREQ_POL;
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+ val &= ~OMAP3430_PRM_POLCTRL_OFFMODE_POL;
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+ pr_debug("PM: fixing sys_clkreq and sys_off_mode polarity to 0x%x\n",
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+ val);
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+ voltdm->write(val, OMAP3_PRM_POLCTRL_OFFSET);
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+ }
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+
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+ /*
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+ * By default let's use I2C4 signaling for retention idle
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+ * and sys_off_mode pin signaling for off idle. This way we
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+ * have sys_clk_req pin go down for retention and both
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+ * sys_clk_req and sys_off_mode pins will go down for off
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+ * idle. And we can also scale voltages to zero for off-idle.
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+ * Note that no actual voltage scaling during off-idle will
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+ * happen unless the board specific twl4030 PMIC scripts are
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+ * loaded.
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+ */
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+ val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
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+ if (!(val & OMAP3430_PRM_VOLTCTRL_SEL_OFF)) {
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+ val |= OMAP3430_PRM_VOLTCTRL_SEL_OFF;
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+ pr_debug("PM: setting voltctrl sys_off_mode signaling to 0x%x\n",
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+ val);
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+ voltdm->write(val, OMAP3_PRM_VOLTCTRL_OFFSET);
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+ }
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+ vc.voltctrl = val;
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+
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+ omap3_vc_set_pmic_signaling(PWRDM_POWER_ON);
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+}
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+
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+static void omap3_init_voltsetup1(struct voltagedomain *voltdm,
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+ struct omap3_vc_timings *c, u32 idle)
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{
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- voltdm->write(omap_usec_to_32k(usec), OMAP3_PRM_CLKSETUP_OFFSET);
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+ unsigned long val;
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+
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+ val = (voltdm->vc_param->on - idle) / voltdm->pmic->slew_rate;
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+ val *= voltdm->sys_clk.rate / 8 / 1000000 + 1;
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+ val <<= __ffs(voltdm->vfsm->voltsetup_mask);
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+ c->voltsetup1 &= ~voltdm->vfsm->voltsetup_mask;
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+ c->voltsetup1 |= val;
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}
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/**
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@@ -236,37 +352,21 @@ static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
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* or retention. Off mode has additionally an option to use sys_off_mode
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* pad, which uses a global signal to program the whole power IC to
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* off-mode.
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+ *
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+ * Note that pmic is not controlling the voltage scaling during
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+ * retention signaled over I2C4, so we can keep voltsetup2 as 0.
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+ * And the oscillator is not shut off over I2C4, so no need to
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+ * set clksetup.
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*/
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-static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
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+static void omap3_set_i2c_timings(struct voltagedomain *voltdm)
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{
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- unsigned long voltsetup1;
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- u32 tgt_volt;
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-
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- /*
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- * Oscillator is shut down only if we are using sys_off_mode pad,
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- * thus we set a minimal setup time here
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- */
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- omap3_set_clksetup(1, voltdm);
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+ struct omap3_vc_timings *c = vc.timings;
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- if (off_mode)
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- tgt_volt = voltdm->vc_param->off;
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- else
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- tgt_volt = voltdm->vc_param->ret;
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-
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- voltsetup1 = (voltdm->vc_param->on - tgt_volt) /
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- voltdm->pmic->slew_rate;
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-
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- voltsetup1 = voltsetup1 * voltdm->sys_clk.rate / 8 / 1000000 + 1;
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-
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- voltdm->rmw(voltdm->vfsm->voltsetup_mask,
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- voltsetup1 << __ffs(voltdm->vfsm->voltsetup_mask),
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- voltdm->vfsm->voltsetup_reg);
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-
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- /*
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- * pmic is not controlling the voltage scaling during retention,
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- * thus set voltsetup2 to 0
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- */
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- voltdm->write(0, OMAP3_PRM_VOLTSETUP2_OFFSET);
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+ /* Configure PRWDM_POWER_OFF over I2C4 */
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+ omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->off);
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+ c++;
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+ /* Configure PRWDM_POWER_RET over I2C4 */
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+ omap3_init_voltsetup1(voltdm, c, voltdm->vc_param->ret);
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}
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/**
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@@ -275,69 +375,49 @@ static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
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*
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* Calculates and sets up off-mode timings for a channel. Off-mode
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* can use either I2C based voltage scaling, or alternatively
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- * sys_off_mode pad can be used to send a global command to power IC.
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- * This function first checks which mode is being used, and calls
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- * omap3_set_i2c_timings() if the system is using I2C control mode.
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+ * sys_off_mode pad can be used to send a global command to power IC.n,
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* sys_off_mode has the additional benefit that voltages can be
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* scaled to zero volt level with TWL4030 / TWL5030, I2C can only
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* scale to 600mV.
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+ *
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+ * Note that omap is not controlling the voltage scaling during
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+ * off idle signaled by sys_off_mode, so we can keep voltsetup1
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+ * as 0.
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*/
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static void omap3_set_off_timings(struct voltagedomain *voltdm)
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{
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- unsigned long clksetup;
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- unsigned long voltsetup2;
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- unsigned long voltsetup2_old;
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- u32 val;
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- u32 tstart, tshut;
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+ struct omap3_vc_timings *c = vc.timings;
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+ u32 tstart, tshut, clksetup, voltoffset;
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- /* check if sys_off_mode is used to control off-mode voltages */
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- val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
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- if (!(val & OMAP3430_SEL_OFF_MASK)) {
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- /* No, omap is controlling them over I2C */
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- omap3_set_i2c_timings(voltdm, true);
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+ if (c->voltsetup2)
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return;
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- }
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omap_pm_get_oscillator(&tstart, &tshut);
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- omap3_set_clksetup(tstart, voltdm);
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-
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- clksetup = voltdm->read(OMAP3_PRM_CLKSETUP_OFFSET);
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-
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- /* voltsetup 2 in us */
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- voltsetup2 = voltdm->vc_param->on / voltdm->pmic->slew_rate;
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-
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- /* convert to 32k clk cycles */
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- voltsetup2 = DIV_ROUND_UP(voltsetup2 * 32768, 1000000);
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-
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- voltsetup2_old = voltdm->read(OMAP3_PRM_VOLTSETUP2_OFFSET);
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-
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- /*
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- * Update voltsetup2 if higher than current value (needed because
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- * we have multiple channels with different ramp times), also
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- * update voltoffset always to value recommended by TRM
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- */
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- if (voltsetup2 > voltsetup2_old) {
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- voltdm->write(voltsetup2, OMAP3_PRM_VOLTSETUP2_OFFSET);
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- voltdm->write(clksetup - voltsetup2,
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- OMAP3_PRM_VOLTOFFSET_OFFSET);
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- } else
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- voltdm->write(clksetup - voltsetup2_old,
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- OMAP3_PRM_VOLTOFFSET_OFFSET);
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+ if (tstart == ULONG_MAX) {
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+ pr_debug("PM: oscillator start-up time not initialized, using 10ms\n");
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+ clksetup = omap_usec_to_32k(10000);
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+ } else {
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+ clksetup = omap_usec_to_32k(tstart);
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+ }
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/*
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- * omap is not controlling voltage scaling during off-mode,
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- * thus set voltsetup1 to 0
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+ * For twl4030 errata 27, we need to allow minimum ~488.32 us wait to
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+ * switch from HFCLKIN to internal oscillator. That means timings
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+ * have voltoffset fixed to 0xa in rounded up 32 KiHz cycles. And
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+ * that means we can calculate the value based on the oscillator
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+ * start-up time since voltoffset2 = clksetup - voltoffset.
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*/
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- voltdm->rmw(voltdm->vfsm->voltsetup_mask, 0,
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- voltdm->vfsm->voltsetup_reg);
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-
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- /* voltoffset must be clksetup minus voltsetup2 according to TRM */
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- voltdm->write(clksetup - voltsetup2, OMAP3_PRM_VOLTOFFSET_OFFSET);
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+ voltoffset = omap_usec_to_32k(488);
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+ c->voltsetup2 = clksetup - voltoffset;
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+ voltdm->write(clksetup, OMAP3_PRM_CLKSETUP_OFFSET);
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+ voltdm->write(voltoffset, OMAP3_PRM_VOLTOFFSET_OFFSET);
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}
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static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
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{
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+ omap3_vc_init_pmic_signaling(voltdm);
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omap3_set_off_timings(voltdm);
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+ omap3_set_i2c_timings(voltdm);
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}
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/**
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Olof Johansson