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@@ -89,10 +89,10 @@ static struct platform_device_id fec_devtype[] = {
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.driver_data = 0,
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}, {
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.name = "imx25-fec",
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- .driver_data = FEC_QUIRK_USE_GASKET,
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+ .driver_data = FEC_QUIRK_USE_GASKET | FEC_QUIRK_MIB_CLEAR,
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}, {
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.name = "imx27-fec",
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- .driver_data = 0,
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+ .driver_data = FEC_QUIRK_MIB_CLEAR,
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}, {
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.name = "imx28-fec",
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.driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME |
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@@ -184,6 +184,9 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
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#define FEC_RACC_SHIFT16 BIT(7)
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#define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
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+/* MIB Control Register */
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+#define FEC_MIB_CTRLSTAT_DISABLE BIT(31)
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+
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/*
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* The 5270/5271/5280/5282/532x RX control register also contains maximum frame
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* size bits. Other FEC hardware does not, so we need to take that into
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@@ -2356,6 +2359,21 @@ static int fec_enet_get_sset_count(struct net_device *dev, int sset)
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}
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}
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+static void fec_enet_clear_ethtool_stats(struct net_device *dev)
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+{
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+ struct fec_enet_private *fep = netdev_priv(dev);
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+ int i;
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+
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+ /* Disable MIB statistics counters */
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+ writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT);
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+
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+ for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
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+ writel(0, fep->hwp + fec_stats[i].offset);
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+
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+ /* Don't disable MIB statistics counters */
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+ writel(0, fep->hwp + FEC_MIB_CTRLSTAT);
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+}
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+
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#else /* !defined(CONFIG_M5272) */
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#define FEC_STATS_SIZE 0
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static inline void fec_enet_update_ethtool_stats(struct net_device *dev)
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@@ -3182,7 +3200,10 @@ static int fec_enet_init(struct net_device *ndev)
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fec_restart(ndev);
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- fec_enet_update_ethtool_stats(ndev);
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+ if (fep->quirks & FEC_QUIRK_MIB_CLEAR)
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+ fec_enet_clear_ethtool_stats(ndev);
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+ else
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+ fec_enet_update_ethtool_stats(ndev);
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return 0;
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}
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