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@@ -686,6 +686,8 @@ struct irq_chip_type {
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* struct irq_chip_generic - Generic irq chip data structure
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* @lock: Lock to protect register and cache data access
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* @reg_base: Register base address (virtual)
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+ * @reg_readl: Alternate I/O accessor (defaults to readl if NULL)
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+ * @reg_writel: Alternate I/O accessor (defaults to writel if NULL)
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* @irq_base: Interrupt base nr for this chip
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* @irq_cnt: Number of interrupts handled by this chip
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* @mask_cache: Cached mask register shared between all chip types
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@@ -710,6 +712,8 @@ struct irq_chip_type {
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struct irq_chip_generic {
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raw_spinlock_t lock;
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void __iomem *reg_base;
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+ u32 (*reg_readl)(void __iomem *addr);
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+ void (*reg_writel)(u32 val, void __iomem *addr);
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unsigned int irq_base;
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unsigned int irq_cnt;
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u32 mask_cache;
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@@ -818,13 +822,19 @@ static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
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static inline void irq_reg_writel(struct irq_chip_generic *gc,
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u32 val, int reg_offset)
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{
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- writel(val, gc->reg_base + reg_offset);
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+ if (gc->reg_writel)
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+ gc->reg_writel(val, gc->reg_base + reg_offset);
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+ else
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+ writel(val, gc->reg_base + reg_offset);
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}
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static inline u32 irq_reg_readl(struct irq_chip_generic *gc,
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int reg_offset)
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{
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- return readl(gc->reg_base + reg_offset);
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+ if (gc->reg_readl)
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+ return gc->reg_readl(gc->reg_base + reg_offset);
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+ else
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+ return readl(gc->reg_base + reg_offset);
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}
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#endif /* _LINUX_IRQ_H */
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