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@@ -30,11 +30,30 @@
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#include "pm.h"
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#define RK3288_GRF_SOC_CON0 0x244
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+#define RK3288_TIMER6_7_PHYS 0xff810000
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static void __init rockchip_timer_init(void)
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{
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if (of_machine_is_compatible("rockchip,rk3288")) {
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struct regmap *grf;
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+ void __iomem *reg_base;
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+
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+ /*
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+ * Most/all uboot versions for rk3288 don't enable timer7
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+ * which is needed for the architected timer to work.
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+ * So make sure it is running during early boot.
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+ */
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+ reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
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+ if (reg_base) {
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+ writel(0, reg_base + 0x30);
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+ writel(0xffffffff, reg_base + 0x20);
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+ writel(0xffffffff, reg_base + 0x24);
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+ writel(1, reg_base + 0x30);
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+ dsb();
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+ iounmap(reg_base);
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+ } else {
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+ pr_err("rockchip: could not map timer7 registers\n");
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+ }
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/*
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* Disable auto jtag/sdmmc switching that causes issues
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