|
@@ -213,6 +213,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
|
|
|
{
|
|
|
struct irq_alloc_info info;
|
|
|
int polarity;
|
|
|
+ int ret;
|
|
|
|
|
|
if (dev->irq_managed && dev->irq > 0)
|
|
|
return 0;
|
|
@@ -244,8 +245,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
|
|
|
* MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
|
|
|
* IOAPIC RTE entries, so we just enable RTE for the device.
|
|
|
*/
|
|
|
- if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info) < 0)
|
|
|
- return -EBUSY;
|
|
|
+ ret = mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC, &info);
|
|
|
+ if (ret < 0)
|
|
|
+ return ret;
|
|
|
|
|
|
dev->irq_managed = 1;
|
|
|
|