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@@ -35,21 +35,6 @@ static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
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m += nr >> 5; \
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- /* \
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- * ARC ISA micro-optimization: \
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- * \
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- * Instructions dealing with bitpos only consider lower 5 bits \
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- * e.g (x << 33) is handled like (x << 1) by ASL instruction \
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- * (mem pointer still needs adjustment to point to next word) \
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- * \
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- * Hence the masking to clamp @nr arg can be elided in general. \
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- * \
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- * However if @nr is a constant (above assumed in a register), \
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- * and greater than 31, gcc can optimize away (x << 33) to 0, \
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- * as overflow, given the 32-bit ISA. Thus masking needs to be \
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- * done for const @nr, but no code is generated due to gcc \
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- * const prop. \
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- */ \
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nr &= 0x1f; \
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\
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__asm__ __volatile__( \
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