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@@ -296,7 +296,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
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spin_unlock_irqrestore(&tdc->lock, flags);
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/* Allocate DMA desc */
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- dma_desc = kzalloc(sizeof(*dma_desc), GFP_ATOMIC);
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+ dma_desc = kzalloc(sizeof(*dma_desc), GFP_NOWAIT);
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if (!dma_desc) {
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dev_err(tdc2dev(tdc), "dma_desc alloc failed\n");
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return NULL;
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@@ -336,7 +336,7 @@ static struct tegra_dma_sg_req *tegra_dma_sg_req_get(
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}
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spin_unlock_irqrestore(&tdc->lock, flags);
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- sg_req = kzalloc(sizeof(struct tegra_dma_sg_req), GFP_ATOMIC);
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+ sg_req = kzalloc(sizeof(struct tegra_dma_sg_req), GFP_NOWAIT);
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if (!sg_req)
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dev_err(tdc2dev(tdc), "sg_req alloc failed\n");
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return sg_req;
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@@ -1186,10 +1186,12 @@ static int tegra_dma_alloc_chan_resources(struct dma_chan *dc)
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dma_cookie_init(&tdc->dma_chan);
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tdc->config_init = false;
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- ret = clk_prepare_enable(tdma->dma_clk);
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+
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+ ret = pm_runtime_get_sync(tdma->dev);
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if (ret < 0)
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- dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
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- return ret;
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+ return ret;
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+
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+ return 0;
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}
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static void tegra_dma_free_chan_resources(struct dma_chan *dc)
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@@ -1232,7 +1234,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
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list_del(&sg_req->node);
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kfree(sg_req);
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}
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- clk_disable_unprepare(tdma->dma_clk);
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+ pm_runtime_put(tdma->dev);
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tdc->slave_id = 0;
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}
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@@ -1356,20 +1358,14 @@ static int tegra_dma_probe(struct platform_device *pdev)
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spin_lock_init(&tdma->global_lock);
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pm_runtime_enable(&pdev->dev);
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- if (!pm_runtime_enabled(&pdev->dev)) {
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+ if (!pm_runtime_enabled(&pdev->dev))
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ret = tegra_dma_runtime_resume(&pdev->dev);
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- if (ret) {
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- dev_err(&pdev->dev, "dma_runtime_resume failed %d\n",
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- ret);
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- goto err_pm_disable;
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- }
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- }
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+ else
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+ ret = pm_runtime_get_sync(&pdev->dev);
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- /* Enable clock before accessing registers */
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- ret = clk_prepare_enable(tdma->dma_clk);
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if (ret < 0) {
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- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
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- goto err_pm_disable;
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+ pm_runtime_disable(&pdev->dev);
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+ return ret;
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}
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/* Reset DMA controller */
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@@ -1382,7 +1378,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
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tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
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tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);
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- clk_disable_unprepare(tdma->dma_clk);
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+ pm_runtime_put(&pdev->dev);
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INIT_LIST_HEAD(&tdma->dma_dev.channels);
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for (i = 0; i < cdata->nr_channels; i++) {
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@@ -1400,8 +1396,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
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}
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tdc->irq = res->start;
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snprintf(tdc->name, sizeof(tdc->name), "apbdma.%d", i);
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- ret = devm_request_irq(&pdev->dev, tdc->irq,
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- tegra_dma_isr, 0, tdc->name, tdc);
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+ ret = request_irq(tdc->irq, tegra_dma_isr, 0, tdc->name, tdc);
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if (ret) {
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dev_err(&pdev->dev,
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"request_irq failed with err %d channel %d\n",
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@@ -1482,10 +1477,11 @@ err_unregister_dma_dev:
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err_irq:
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while (--i >= 0) {
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struct tegra_dma_channel *tdc = &tdma->channels[i];
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+
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+ free_irq(tdc->irq, tdc);
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tasklet_kill(&tdc->tasklet);
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}
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-err_pm_disable:
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pm_runtime_disable(&pdev->dev);
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if (!pm_runtime_status_suspended(&pdev->dev))
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tegra_dma_runtime_suspend(&pdev->dev);
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@@ -1502,6 +1498,7 @@ static int tegra_dma_remove(struct platform_device *pdev)
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for (i = 0; i < tdma->chip_data->nr_channels; ++i) {
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tdc = &tdma->channels[i];
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+ free_irq(tdc->irq, tdc);
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tasklet_kill(&tdc->tasklet);
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}
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@@ -1514,8 +1511,7 @@ static int tegra_dma_remove(struct platform_device *pdev)
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static int tegra_dma_runtime_suspend(struct device *dev)
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{
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- struct platform_device *pdev = to_platform_device(dev);
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- struct tegra_dma *tdma = platform_get_drvdata(pdev);
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+ struct tegra_dma *tdma = dev_get_drvdata(dev);
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clk_disable_unprepare(tdma->dma_clk);
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return 0;
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@@ -1523,8 +1519,7 @@ static int tegra_dma_runtime_suspend(struct device *dev)
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static int tegra_dma_runtime_resume(struct device *dev)
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{
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- struct platform_device *pdev = to_platform_device(dev);
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- struct tegra_dma *tdma = platform_get_drvdata(pdev);
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+ struct tegra_dma *tdma = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(tdma->dma_clk);
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@@ -1543,7 +1538,7 @@ static int tegra_dma_pm_suspend(struct device *dev)
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int ret;
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/* Enable clock before accessing register */
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- ret = tegra_dma_runtime_resume(dev);
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+ ret = pm_runtime_get_sync(dev);
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if (ret < 0)
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return ret;
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@@ -1552,15 +1547,22 @@ static int tegra_dma_pm_suspend(struct device *dev)
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struct tegra_dma_channel *tdc = &tdma->channels[i];
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struct tegra_dma_channel_regs *ch_reg = &tdc->channel_reg;
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+ /* Only save the state of DMA channels that are in use */
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+ if (!tdc->config_init)
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+ continue;
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+
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ch_reg->csr = tdc_read(tdc, TEGRA_APBDMA_CHAN_CSR);
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ch_reg->ahb_ptr = tdc_read(tdc, TEGRA_APBDMA_CHAN_AHBPTR);
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ch_reg->apb_ptr = tdc_read(tdc, TEGRA_APBDMA_CHAN_APBPTR);
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ch_reg->ahb_seq = tdc_read(tdc, TEGRA_APBDMA_CHAN_AHBSEQ);
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ch_reg->apb_seq = tdc_read(tdc, TEGRA_APBDMA_CHAN_APBSEQ);
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+ if (tdma->chip_data->support_separate_wcount_reg)
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+ ch_reg->wcount = tdc_read(tdc,
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+ TEGRA_APBDMA_CHAN_WCOUNT);
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}
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/* Disable clock */
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- tegra_dma_runtime_suspend(dev);
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+ pm_runtime_put(dev);
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return 0;
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}
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@@ -1571,7 +1573,7 @@ static int tegra_dma_pm_resume(struct device *dev)
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int ret;
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/* Enable clock before accessing register */
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- ret = tegra_dma_runtime_resume(dev);
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+ ret = pm_runtime_get_sync(dev);
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if (ret < 0)
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return ret;
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@@ -1583,6 +1585,13 @@ static int tegra_dma_pm_resume(struct device *dev)
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struct tegra_dma_channel *tdc = &tdma->channels[i];
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struct tegra_dma_channel_regs *ch_reg = &tdc->channel_reg;
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+ /* Only restore the state of DMA channels that are in use */
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+ if (!tdc->config_init)
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+ continue;
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+
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+ if (tdma->chip_data->support_separate_wcount_reg)
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+ tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT,
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+ ch_reg->wcount);
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tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_reg->apb_seq);
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tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_reg->apb_ptr);
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tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_reg->ahb_seq);
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@@ -1592,16 +1601,14 @@ static int tegra_dma_pm_resume(struct device *dev)
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}
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/* Disable clock */
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- tegra_dma_runtime_suspend(dev);
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+ pm_runtime_put(dev);
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return 0;
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}
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#endif
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static const struct dev_pm_ops tegra_dma_dev_pm_ops = {
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-#ifdef CONFIG_PM
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- .runtime_suspend = tegra_dma_runtime_suspend,
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- .runtime_resume = tegra_dma_runtime_resume,
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-#endif
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+ SET_RUNTIME_PM_OPS(tegra_dma_runtime_suspend, tegra_dma_runtime_resume,
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+ NULL)
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SET_SYSTEM_SLEEP_PM_OPS(tegra_dma_pm_suspend, tegra_dma_pm_resume)
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};
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