|
@@ -162,29 +162,6 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
|
|
typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
|
|
typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
|
|
#endif
|
|
#endif
|
|
|
|
|
|
-
|
|
|
|
-/*
|
|
|
|
- * The requirements here are:
|
|
|
|
- * - keep the final alignment of sp (sp & 0xf)
|
|
|
|
- * - make sure the 32-bit value at the first 16 byte aligned position of
|
|
|
|
- * AUXV is greater than 16 for glibc compatibility.
|
|
|
|
- * AT_IGNOREPPC is used for that.
|
|
|
|
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
|
|
|
|
- * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
|
|
|
|
- * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
|
|
|
|
- */
|
|
|
|
-#define ARCH_DLINFO \
|
|
|
|
-do { \
|
|
|
|
- /* Handle glibc compatibility. */ \
|
|
|
|
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
|
|
|
|
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
|
|
|
|
- /* Cache size items */ \
|
|
|
|
- NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
|
|
|
|
- NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
|
|
|
|
- NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
|
|
|
|
- VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \
|
|
|
|
-} while (0)
|
|
|
|
-
|
|
|
|
/* PowerPC64 relocations defined by the ABIs */
|
|
/* PowerPC64 relocations defined by the ABIs */
|
|
#define R_PPC64_NONE R_PPC_NONE
|
|
#define R_PPC64_NONE R_PPC_NONE
|
|
#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
|
|
#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
|