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@@ -0,0 +1,332 @@
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+/*
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+ * User-space Probes (UProbes) for s390
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+ *
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+ * Copyright IBM Corp. 2014
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+ * Author(s): Jan Willeke,
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+ */
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+
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+#include <linux/kprobes.h>
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+#include <linux/uaccess.h>
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+#include <linux/uprobes.h>
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+#include <linux/compat.h>
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+#include <linux/kdebug.h>
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+#include <asm/switch_to.h>
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+#include <asm/facility.h>
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+#include <asm/dis.h>
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+#include "entry.h"
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+
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+#define UPROBE_TRAP_NR UINT_MAX
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+
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+int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe, struct mm_struct *mm,
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+ unsigned long addr)
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+{
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+ return probe_is_prohibited_opcode(auprobe->insn);
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+}
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+
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+int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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+{
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+ if (psw_bits(regs->psw).eaba == PSW_AMODE_24BIT)
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+ return -EINVAL;
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+ if (!is_compat_task() && psw_bits(regs->psw).eaba == PSW_AMODE_31BIT)
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+ return -EINVAL;
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+ clear_pt_regs_flag(regs, PIF_PER_TRAP);
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+ auprobe->saved_per = psw_bits(regs->psw).r;
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+ auprobe->saved_int_code = regs->int_code;
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+ regs->int_code = UPROBE_TRAP_NR;
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+ regs->psw.addr = current->utask->xol_vaddr;
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+ set_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
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+ update_cr_regs(current);
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+ return 0;
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+}
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+
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+bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
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+{
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+ struct pt_regs *regs = task_pt_regs(tsk);
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+
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+ if (regs->int_code != UPROBE_TRAP_NR)
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+ return true;
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+ return false;
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+}
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+
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+int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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+{
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+ int fixup = probe_get_fixup_type(auprobe->insn);
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+ struct uprobe_task *utask = current->utask;
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+
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+ clear_tsk_thread_flag(current, TIF_UPROBE_SINGLESTEP);
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+ update_cr_regs(current);
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+ psw_bits(regs->psw).r = auprobe->saved_per;
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+ regs->int_code = auprobe->saved_int_code;
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+
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+ if (fixup & FIXUP_PSW_NORMAL)
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+ regs->psw.addr += utask->vaddr - utask->xol_vaddr;
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+ if (fixup & FIXUP_RETURN_REGISTER) {
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+ int reg = (auprobe->insn[0] & 0xf0) >> 4;
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+
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+ regs->gprs[reg] += utask->vaddr - utask->xol_vaddr;
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+ }
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+ if (fixup & FIXUP_BRANCH_NOT_TAKEN) {
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+ int ilen = insn_length(auprobe->insn[0] >> 8);
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+
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+ if (regs->psw.addr - utask->xol_vaddr == ilen)
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+ regs->psw.addr = utask->vaddr + ilen;
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+ }
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+ /* If per tracing was active generate trap */
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+ if (regs->psw.mask & PSW_MASK_PER)
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+ do_per_trap(regs);
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+ return 0;
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+}
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+
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+int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val,
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+ void *data)
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+{
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+ struct die_args *args = data;
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+ struct pt_regs *regs = args->regs;
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+
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+ if (!user_mode(regs))
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+ return NOTIFY_DONE;
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+ if (regs->int_code & 0x200) /* Trap during transaction */
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+ return NOTIFY_DONE;
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+ switch (val) {
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+ case DIE_BPT:
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+ if (uprobe_pre_sstep_notifier(regs))
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+ return NOTIFY_STOP;
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+ break;
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+ case DIE_SSTEP:
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+ if (uprobe_post_sstep_notifier(regs))
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+ return NOTIFY_STOP;
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+ default:
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+ break;
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+ }
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+ return NOTIFY_DONE;
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+}
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+
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+void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
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+{
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+ clear_thread_flag(TIF_UPROBE_SINGLESTEP);
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+ regs->int_code = auprobe->saved_int_code;
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+ regs->psw.addr = current->utask->vaddr;
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+}
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+
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+unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline,
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+ struct pt_regs *regs)
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+{
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+ unsigned long orig;
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+
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+ orig = regs->gprs[14];
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+ regs->gprs[14] = trampoline;
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+ return orig;
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+}
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+
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+/* Instruction Emulation */
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+
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+static void adjust_psw_addr(psw_t *psw, unsigned long len)
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+{
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+ psw->addr = __rewind_psw(*psw, -len);
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+}
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+
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+#define EMU_ILLEGAL_OP 1
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+#define EMU_SPECIFICATION 2
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+#define EMU_ADDRESSING 3
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+
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+#define emu_load_ril(ptr, output) \
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+({ \
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+ unsigned int mask = sizeof(*(ptr)) - 1; \
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+ __typeof__(*(ptr)) input; \
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+ int __rc = 0; \
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+ \
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+ if (!test_facility(34)) \
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+ __rc = EMU_ILLEGAL_OP; \
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+ else if ((u64 __force)ptr & mask) \
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+ __rc = EMU_SPECIFICATION; \
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+ else if (get_user(input, ptr)) \
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+ __rc = EMU_ADDRESSING; \
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+ else \
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+ *(output) = input; \
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+ __rc; \
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+})
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+
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+#define emu_store_ril(ptr, input) \
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+({ \
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+ unsigned int mask = sizeof(*(ptr)) - 1; \
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+ int __rc = 0; \
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+ \
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+ if (!test_facility(34)) \
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+ __rc = EMU_ILLEGAL_OP; \
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+ else if ((u64 __force)ptr & mask) \
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+ __rc = EMU_SPECIFICATION; \
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+ else if (put_user(*(input), ptr)) \
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+ __rc = EMU_ADDRESSING; \
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+ __rc; \
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+})
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+
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+#define emu_cmp_ril(regs, ptr, cmp) \
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+({ \
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+ unsigned int mask = sizeof(*(ptr)) - 1; \
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+ __typeof__(*(ptr)) input; \
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+ int __rc = 0; \
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+ \
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+ if (!test_facility(34)) \
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+ __rc = EMU_ILLEGAL_OP; \
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+ else if ((u64 __force)ptr & mask) \
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+ __rc = EMU_SPECIFICATION; \
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+ else if (get_user(input, ptr)) \
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+ __rc = EMU_ADDRESSING; \
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+ else if (input > *(cmp)) \
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+ psw_bits((regs)->psw).cc = 1; \
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+ else if (input < *(cmp)) \
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+ psw_bits((regs)->psw).cc = 2; \
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+ else \
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+ psw_bits((regs)->psw).cc = 0; \
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+ __rc; \
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+})
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+
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+struct insn_ril {
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+ u8 opc0;
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+ u8 reg : 4;
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+ u8 opc1 : 4;
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+ s32 disp;
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+} __packed;
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+
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+union split_register {
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+ u64 u64;
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+ u32 u32[2];
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+ u16 u16[4];
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+ s64 s64;
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+ s32 s32[2];
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+ s16 s16[4];
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+};
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+
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+/*
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+ * pc relative instructions are emulated, since parameters may not be
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+ * accessible from the xol area due to range limitations.
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+ */
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+static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs)
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+{
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+ union split_register *rx;
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+ struct insn_ril *insn;
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+ unsigned int ilen;
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+ void *uptr;
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+ int rc = 0;
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+
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+ insn = (struct insn_ril *) &auprobe->insn;
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+ rx = (union split_register *) ®s->gprs[insn->reg];
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+ uptr = (void *)(regs->psw.addr + (insn->disp * 2));
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+ ilen = insn_length(insn->opc0);
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+
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+ switch (insn->opc0) {
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+ case 0xc0:
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+ switch (insn->opc1) {
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+ case 0x00: /* larl */
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+ rx->u64 = (unsigned long)uptr;
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+ break;
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+ }
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+ break;
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+ case 0xc4:
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+ switch (insn->opc1) {
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+ case 0x02: /* llhrl */
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+ rc = emu_load_ril((u16 __user *)uptr, &rx->u32[1]);
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+ break;
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+ case 0x04: /* lghrl */
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+ rc = emu_load_ril((s16 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x05: /* lhrl */
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+ rc = emu_load_ril((s16 __user *)uptr, &rx->u32[1]);
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+ break;
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+ case 0x06: /* llghrl */
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+ rc = emu_load_ril((u16 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x08: /* lgrl */
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+ rc = emu_load_ril((u64 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x0c: /* lgfrl */
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+ rc = emu_load_ril((s32 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x0d: /* lrl */
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+ rc = emu_load_ril((u32 __user *)uptr, &rx->u32[1]);
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+ break;
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+ case 0x0e: /* llgfrl */
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+ rc = emu_load_ril((u32 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x07: /* sthrl */
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+ rc = emu_store_ril((u16 __user *)uptr, &rx->u16[3]);
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+ break;
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+ case 0x0b: /* stgrl */
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+ rc = emu_store_ril((u64 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x0f: /* strl */
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+ rc = emu_store_ril((u32 __user *)uptr, &rx->u32[1]);
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+ break;
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+ }
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+ break;
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+ case 0xc6:
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+ switch (insn->opc1) {
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+ case 0x02: /* pfdrl */
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+ if (!test_facility(34))
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+ rc = EMU_ILLEGAL_OP;
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+ break;
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+ case 0x04: /* cghrl */
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+ rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s64);
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+ break;
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+ case 0x05: /* chrl */
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+ rc = emu_cmp_ril(regs, (s16 __user *)uptr, &rx->s32[1]);
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+ break;
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+ case 0x06: /* clghrl */
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+ rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x07: /* clhrl */
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+ rc = emu_cmp_ril(regs, (u16 __user *)uptr, &rx->u32[1]);
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+ break;
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+ case 0x08: /* cgrl */
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+ rc = emu_cmp_ril(regs, (s64 __user *)uptr, &rx->s64);
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+ break;
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+ case 0x0a: /* clgrl */
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+ rc = emu_cmp_ril(regs, (u64 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x0c: /* cgfrl */
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+ rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s64);
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+ break;
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+ case 0x0d: /* crl */
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+ rc = emu_cmp_ril(regs, (s32 __user *)uptr, &rx->s32[1]);
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+ break;
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+ case 0x0e: /* clgfrl */
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+ rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u64);
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+ break;
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+ case 0x0f: /* clrl */
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+ rc = emu_cmp_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
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+ break;
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+ }
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+ break;
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+ }
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+ adjust_psw_addr(®s->psw, ilen);
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+ switch (rc) {
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+ case EMU_ILLEGAL_OP:
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+ regs->int_code = ilen << 16 | 0x0001;
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+ do_report_trap(regs, SIGILL, ILL_ILLOPC, NULL);
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+ break;
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+ case EMU_SPECIFICATION:
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+ regs->int_code = ilen << 16 | 0x0006;
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+ do_report_trap(regs, SIGILL, ILL_ILLOPC , NULL);
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+ break;
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+ case EMU_ADDRESSING:
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+ regs->int_code = ilen << 16 | 0x0005;
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+ do_report_trap(regs, SIGSEGV, SEGV_MAPERR, NULL);
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+ break;
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+ }
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+}
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+
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+bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
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+{
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+ if ((psw_bits(regs->psw).eaba == PSW_AMODE_24BIT) ||
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+ ((psw_bits(regs->psw).eaba == PSW_AMODE_31BIT) &&
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+ !is_compat_task())) {
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+ regs->psw.addr = __rewind_psw(regs->psw, UPROBE_SWBP_INSN_SIZE);
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+ do_report_trap(regs, SIGILL, ILL_ILLADR, NULL);
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+ return true;
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+ }
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+ if (probe_is_insn_relative_long(auprobe->insn)) {
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+ handle_insn_ril(auprobe, regs);
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+ return true;
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+ }
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+ return false;
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+}
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